Memmapping port step 1 - easier to read, still a lot to do. Power on w/ clear SRAM now works with SA-1 games. Reverted chips/sa1proc.asm to rev 1.42 because all recent work only breaks HnK3 (the SMRPG fix is due to pagefault's subscreen/windowing logic fixes).
This commit is contained in:
grinvader
@@ -39,8 +39,8 @@ CHIPSOBJ=${CHIPDIR}/sfxproc.o ${CHIPDIR}/fxemu2.o ${CHIPDIR}/dsp1proc.o\
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CPUOBJ=${CPUDIR}/addrni.o ${CPUDIR}/dma.o ${CPUDIR}/dsp.o ${CPUDIR}/dspproc.o\
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${CPUDIR}/execute.o ${CPUDIR}/irq.o ${CPUDIR}/memory.o\
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${CPUDIR}/spc700.o ${CPUDIR}/stable.o ${CPUDIR}/table.o\
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${CPUDIR}/tableb.o ${CPUDIR}/tablec.o
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${CPUDIR}/memtable.o ${CPUDIR}/spc700.o ${CPUDIR}/stable.o\
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${CPUDIR}/table.o ${CPUDIR}/tableb.o ${CPUDIR}/tablec.o
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GUIOBJ=${GUIDIR}/gui.o ${GUIDIR}/menu.o
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@@ -148,6 +148,7 @@ ${CPUDIR}/stable.o: ${CPUDIR}/stable.asm ${CPUDIR}/s65816d.inc\
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${CPUDIR}/saddress.inc ${CPUDIR}/saddrni.inc ${CPUDIR}/se65816.inc\
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macros.mac
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${CPUDIR}/memory.o: ${CPUDIR}/memory.asm macros.mac
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${CPUDIR}/memtable.o: ${CPUDIR}/memtable.c
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${CPUDIR}/dma.o: ${CPUDIR}/dma.asm macros.mac
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${DOSDIR}/dosintrf.o: ${DOSDIR}/dosintrf.asm macros.mac
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vcache.o:vcache.asm macros.mac
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@@ -234,7 +235,3 @@ clean:
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distclean:
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rm -f ${CHIPDIR}/*.o ${CPUDIR}/*.o ${VIDEODIR}/*.o ${NETDIR}/*.o ${GUIDIR}/*.o ${DOSDIR}/*.o ${WINDIR}/*.o ${ZIPDIR}/*.o ${EFFECTSDIR}/*.o ${JMADIR}/*.o *.o @ZSNESEXE@ Makefile config.cache config.log config.status config.h
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@@ -26,6 +26,7 @@ source_files = Split("""
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cpu/execute.asm
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cpu/irq.asm
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cpu/memory.asm
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cpu/memtable.c
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cpu/spc700.asm
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cpu/stable.asm
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cpu/table.asm
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@@ -121,7 +121,7 @@ NEWSYM SA1Swap
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; Check if IRQ is executed on SA-1
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xor eax,eax
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mov al,dl
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add dh,150
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add dh,25
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mov edi,[SA1tablead+eax*4]
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mov byte[SA1Status],1
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test dword[SA1DoIRQ],0FF000003h
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@@ -157,14 +157,14 @@ NEWSYM SA1Swap
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mov dword[snesmap2],eax
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mov edi,[prevedi]
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xor eax,eax
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add dh,34
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add dh,11
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inc byte[CurrentExecSA1]
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mov byte[SA1Status],0
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add dword[SA1TimerVal],23
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ret
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.speedhack
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add dh,50
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add dh,100
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mov bl,[esi]
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inc esi
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@@ -191,7 +191,7 @@ NEWSYM SA1Swap
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mov byte[SA1Status],0
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add dword[SA1TimerVal],23
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; xor dh,dh
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add dh,35
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mov dh,18
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cmp esi,dword[SA1LBound]
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jb .stoph
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cmp esi,dword[SA1UBound]
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@@ -3229,50 +3229,6 @@ NEWSYM SA1UpdateDPage
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pop eax
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ret
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NEWSYM GenerateBank0Table
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mov eax,Bank0datr8
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writetobank0table membank0r8ram,20h
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writetobank0table membank0r8reg,28h
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writetobank0table membank0r8inv,17h
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writetobank0table membank0r8chip,1Fh
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writetobank0table membank0r8rom,81h
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writetobank0table membank0r8romram,1h
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mov eax,Bank0datw8
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writetobank0table membank0w8ram,20h
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writetobank0table membank0w8reg,28h
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writetobank0table membank0w8inv,17h
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writetobank0table membank0w8chip,1Fh
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writetobank0table membank0w8rom,81h
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writetobank0table membank0w8romram,1h
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mov eax,Bank0datr16
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writetobank0table membank0r16ram,1Fh
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writetobank0table membank0r16ramh,1
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writetobank0table membank0r16reg,28h
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writetobank0table membank0r16inv,17h
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writetobank0table membank0r16chip,1Fh
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writetobank0table membank0r16rom,81h
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writetobank0table membank0r16romram,1h
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mov eax,Bank0datw16
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writetobank0table membank0w16ram,1Fh
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writetobank0table membank0w16ramh,1
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writetobank0table membank0w16reg,28h
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writetobank0table membank0w16inv,17h
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writetobank0table membank0w16chip,1Fh
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writetobank0table membank0w16rom,81h
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writetobank0table membank0w16romram,1h
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ret
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NEWSYM GenerateBank0TableSA1
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mov eax,Bank0datr8
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writetobank0table membank0r8ramSA1,20h
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mov eax,Bank0datw8
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writetobank0table membank0w8ramSA1,20h
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mov eax,Bank0datr16
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writetobank0table membank0r16ramSA1,20h
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mov eax,Bank0datw16
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writetobank0table membank0w16ramSA1,20h
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ret
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; SA1 Stuff
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NEWSYM membank0r8ramSA1 ; 0000-1FFF
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cmp byte[SA1Status],0
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432
zsnes/src/cpu/memtable.c
Normal file
432
zsnes/src/cpu/memtable.c
Normal file
@@ -0,0 +1,432 @@
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/*
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Copyright (C) 1997-2005 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
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http://www.zsnes.com
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http://sourceforge.net/projects/zsnes
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later
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version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifdef __LINUX__
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#include "gblhdr.h"
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#define DIR_SLASH "/"
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#else
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/stat.h>
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#define DIR_SLASH "\\"
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#endif
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#include "gblvars.h"
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extern unsigned int Curtableaddr, tableA[256];
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void PrepareOffset()
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{
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Curtableaddr -= (unsigned int)tableA;
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}
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void ResetOffset()
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{
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Curtableaddr += (unsigned int)tableA;
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}
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extern unsigned int snesmmap[256], snesmap2[256];
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void BankSwitchSDD1C (unsigned char bankval, unsigned int offset)
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{
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unsigned int curbankval = bankval, i;
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curbankval &= 7;
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curbankval <<= 20;
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curbankval += (unsigned int)romdata;
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for (i=0; i<16 ; i++)
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{
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snesmap2[offset+i] = curbankval;
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snesmmap[offset+i] = curbankval;
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curbankval += 0x10000;
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}
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}
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extern unsigned char SDD1BankA, SDD1BankB, SDD1BankC, SDD1BankD;
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void UpdateBanksSDD1()
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{
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if (SDD1BankA)
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{
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BankSwitchSDD1C(SDD1BankA, 0x0C0);
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BankSwitchSDD1C(SDD1BankB, 0x0D0);
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BankSwitchSDD1C(SDD1BankC, 0x0E0);
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BankSwitchSDD1C(SDD1BankD, 0x0F0);
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}
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}
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extern void (*Bank0datr8[256])(), (*Bank0datr16[256])(), (*Bank0datw8[256])();
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extern void (*Bank0datw16[256])(), *DPageR8, *DPageR16, *DPageW8, *DPageW16;
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extern unsigned int xdb, xpb, xs, xx, xy, xd;
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extern unsigned short oamaddrt, xat, xst, xdt, xxt, xyt;
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extern unsigned char xdbt, xpbt;
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void UpdateDPageC()
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{
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DPageR8 = Bank0datr8[(xd >> 8) & 0xFF];
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DPageR16 = Bank0datr16[(xd >> 8) & 0xFF];
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DPageW8 = Bank0datw8[(xd >> 8) & 0xFF];
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DPageW16 = Bank0datw16[(xd >> 8) & 0xFF];
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}
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extern unsigned int SA1xd;
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extern void *SA1DPageR8, *SA1DPageR16, *SA1DPageW8, *SA1DPageW16;
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void SA1UpdateDPageC()
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{
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SA1DPageR8 = Bank0datr8[(SA1xd >> 8) & 0xFF];
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SA1DPageR16 = Bank0datr16[(SA1xd >> 8) & 0xFF];
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SA1DPageW8 = Bank0datw8[(SA1xd >> 8) & 0xFF];
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SA1DPageW16 = Bank0datw16[(SA1xd >> 8) & 0xFF];
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}
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void unpackfunct()
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{
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oamaddrt = (oamaddr & 0xFFFF);
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xat = (xa & 0xFFFF);
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xdbt = (xdb & 0xFF);
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xpbt = (xpb & 0xFF);
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xst = (xs & 0xFFFF);
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xdt = (xd & 0xFFFF);
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xxt = (xx & 0xFFFF);
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xyt = (xy & 0xFFFF);
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}
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#define bit_test(byte, checkbit) (byte & (1 << checkbit)) ? 1 : 0
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extern unsigned int GlobalVL, GlobalVR, EchoVL, EchoVR, EchoRate[16], MaxEcho;
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extern unsigned int EchoFB, NoiseSpeeds[32], dspPAdj, NoiseInc, bg1ptrx;
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extern unsigned int bg1ptry, bg2ptrx, bg2ptry, bg3ptrx, bg3ptry, bg4ptrx;
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extern unsigned int bg4ptry;
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extern signed int FIRTAPVal0, FIRTAPVal1, FIRTAPVal2, FIRTAPVal3, FIRTAPVal4;
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extern signed int FIRTAPVal5, FIRTAPVal6, FIRTAPVal7;
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extern unsigned short VolumeConvTable[32768], bg1ptr, bg1ptrb, bg1ptrc;
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extern unsigned short bg2ptr, bg2ptrb, bg2ptrc, bg3ptr, bg3ptrb, bg3ptrc;
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extern unsigned short bg4ptr, bg4ptrb, bg4ptrc;
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extern unsigned char VolumeTableb[256], MusicVol, Voice0Status;
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extern unsigned char Voice1Status, Voice2Status, Voice3Status, Voice4Status;
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extern unsigned char Voice5Status, Voice6Status, Voice7Status, Voice0Noise;
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extern unsigned char Voice1Noise, Voice2Noise, Voice3Noise, Voice4Noise;
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extern unsigned char Voice5Noise, Voice6Noise, Voice7Noise, bgtilesz;
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extern unsigned char BG116x16t, BG216x16t, BG316x16t, BG416x16t, vramincby8on;
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extern unsigned char vramincr;
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extern void (**regptw)();
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void reg2118();
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void reg2118inc();
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void reg2118inc8();
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void reg2118inc8inc();
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void reg2119();
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void reg2119inc();
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void reg2119inc8();
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void reg2119inc8inc();
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void repackfunct()
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{
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signed char val;
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unsigned char block;
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// Global/Echo Volumes
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GlobalVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x0C]]] & 0xFF);
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GlobalVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x1C]]] & 0xFF);
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EchoVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x2C]]] & 0xFF);
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EchoVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x3C]]] & 0xFF);
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// Echo Values
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MaxEcho = EchoRate[(DSPMem[0x7D] & 0xF)];
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EchoFB = VolumeTableb[DSPMem[0x0D]];
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||||
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// FIR Filter Values
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val = DSPMem[0x0F];
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FIRTAPVal0 = (signed int)val;
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val = DSPMem[0x1F];
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FIRTAPVal1 = (signed int)val;
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val = DSPMem[0x2F];
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FIRTAPVal2 = (signed int)val;
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val = DSPMem[0x3F];
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FIRTAPVal3 = (signed int)val;
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val = DSPMem[0x4F];
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FIRTAPVal4 = (signed int)val;
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val = DSPMem[0x5F];
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FIRTAPVal5 = (signed int)val;
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val = DSPMem[0x6F];
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FIRTAPVal6 = (signed int)val;
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val = DSPMem[0x7F];
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FIRTAPVal7 = (signed int)val;
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// Noise
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||||
block = DSPMem[0x6C];
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||||
DSPMem[0x6C] &= 0x7F;
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||||
|
||||
if (block && 0xC0)
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{
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||||
Voice0Status = Voice1Status = Voice2Status = Voice3Status = 0;
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||||
Voice4Status = Voice5Status = Voice6Status = Voice7Status = 0;
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}
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||||
NoiseInc = (((NoiseSpeeds[(block & 0x1F)] * dspPAdj) >> 17) & 0xFFFFFFFF);
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||||
|
||||
Voice0Noise = bit_test(DSPMem[0x3D], 0);
|
||||
Voice1Noise = bit_test(DSPMem[0x3D], 1);
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||||
Voice2Noise = bit_test(DSPMem[0x3D], 2);
|
||||
Voice3Noise = bit_test(DSPMem[0x3D], 3);
|
||||
Voice4Noise = bit_test(DSPMem[0x3D], 4);
|
||||
Voice5Noise = bit_test(DSPMem[0x3D], 5);
|
||||
Voice6Noise = bit_test(DSPMem[0x3D], 6);
|
||||
Voice7Noise = bit_test(DSPMem[0x3D], 7);
|
||||
|
||||
bg1ptrx = bg1ptrb - bg1ptr;
|
||||
bg1ptry = bg1ptrc - bg1ptr;
|
||||
bg2ptrx = bg2ptrb - bg2ptr;
|
||||
bg2ptry = bg2ptrc - bg2ptr;
|
||||
bg3ptrx = bg3ptrb - bg3ptr;
|
||||
bg3ptry = bg3ptrc - bg3ptr;
|
||||
bg4ptrx = bg4ptrb - bg4ptr;
|
||||
bg4ptry = bg4ptrc - bg4ptr;
|
||||
|
||||
// 16x16 tiles
|
||||
BG116x16t = bit_test(bgtilesz, 0);
|
||||
BG216x16t = bit_test(bgtilesz, 1);
|
||||
BG316x16t = bit_test(bgtilesz, 2);
|
||||
BG416x16t = bit_test(bgtilesz, 3);
|
||||
|
||||
oamaddr = oamaddrt;
|
||||
xa = xat;
|
||||
xdb = xdbt;
|
||||
xpb = xpbt;
|
||||
xs = xst;
|
||||
xd = xdt;
|
||||
xx = xxt;
|
||||
xy = xyt;
|
||||
|
||||
if (vramincby8on == 1)
|
||||
{
|
||||
if (vramincr == 1)
|
||||
{
|
||||
regptw[0x2118] = reg2118inc8inc;
|
||||
regptw[0x2119] = reg2119inc8;
|
||||
}
|
||||
else
|
||||
{
|
||||
regptw[0x2118] = reg2118inc8;
|
||||
regptw[0x2119] = reg2119inc8inc;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (vramincr == 1)
|
||||
{
|
||||
regptw[0x2118] = reg2118inc;
|
||||
regptw[0x2119] = reg2119;
|
||||
}
|
||||
else
|
||||
{
|
||||
regptw[0x2118] = reg2118;
|
||||
regptw[0x2119] = reg2119inc;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
extern void (*memtabler8[256])();
|
||||
extern void (*memtablew8[256])();
|
||||
extern void (*memtabler16[256])();
|
||||
extern void (*memtablew16[256])();
|
||||
|
||||
void regaccessbankr8(), regaccessbankr8SA1();
|
||||
void memaccessbankr8();
|
||||
void sramaccessbankr8(), SA1RAMaccessbankr8(), SA1RAMaccessbankr8b();
|
||||
void wramaccessbankr8(), eramaccessbankr8();
|
||||
|
||||
void regaccessbankw8(), regaccessbankw8SA1();
|
||||
void memaccessbankw8();
|
||||
void sramaccessbankw8(), SA1RAMaccessbankw8(), SA1RAMaccessbankw8b();
|
||||
void wramaccessbankw8(), eramaccessbankw8();
|
||||
|
||||
void regaccessbankr16(), regaccessbankr16SA1();
|
||||
void memaccessbankr16();
|
||||
void sramaccessbankr16(), SA1RAMaccessbankr16(), SA1RAMaccessbankr16b();
|
||||
void wramaccessbankr16(), eramaccessbankr16();
|
||||
|
||||
void regaccessbankw16(), regaccessbankw16SA1();
|
||||
void memaccessbankw16();
|
||||
void sramaccessbankw16(), SA1RAMaccessbankw16(), SA1RAMaccessbankw16b();
|
||||
void wramaccessbankw16(), eramaccessbankw16();
|
||||
|
||||
/*
|
||||
rep_stosd is my name for a 'copy <num> times a function pointer <func_ptr> into
|
||||
a function pointer array <dest>' function, in honour of the almighty asm
|
||||
instruction rep stosd, which is able to do that (and much more).
|
||||
Since ZSNES is just full of func pointer arrays, it'll probably come in handy.
|
||||
*/
|
||||
|
||||
void rep_stosd(void (**dest)(), void (*func_ptr), unsigned int num)
|
||||
{
|
||||
while (num--) { dest[num] = func_ptr; }
|
||||
}
|
||||
|
||||
void SetAddressingModes()
|
||||
{
|
||||
// set 8-bit read memory tables banks
|
||||
rep_stosd(memtabler8+0x00, regaccessbankr8, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler8+0x40, memaccessbankr8, 0x30); // 40 - 6F
|
||||
rep_stosd(memtabler8+0x70, sramaccessbankr8, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler8+0x78, memaccessbankr8, 0x06); // 78 - 7D
|
||||
memtabler8[0x7E] = wramaccessbankr8; // 7E
|
||||
memtabler8[0x7F] = eramaccessbankr8; // 7F
|
||||
rep_stosd(memtabler8+0x80, regaccessbankr8, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler8+0xC0, memaccessbankr8, 0x40); // C0 - FF
|
||||
|
||||
// set 8-bit write memory tables banks
|
||||
rep_stosd(memtablew8+0x00, regaccessbankw8, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew8+0x40, memaccessbankw8, 0x30); // 40 - 6F
|
||||
rep_stosd(memtablew8+0x70, sramaccessbankw8, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew8+0x78, memaccessbankw8, 0x06); // 78 - 7D
|
||||
memtablew8[0x7E] = wramaccessbankw8; // 7E
|
||||
memtablew8[0x7F] = eramaccessbankw8; // 7F
|
||||
rep_stosd(memtablew8+0x80, regaccessbankw8, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew8+0xC0, memaccessbankw8, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit read memory tables banks
|
||||
rep_stosd(memtabler16+0x00, regaccessbankr16, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler16+0x40, memaccessbankr16, 0x30); // 40 - 6F
|
||||
rep_stosd(memtabler16+0x70, sramaccessbankr16, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler16+0x78, memaccessbankr16, 0x06); // 78 - 7D
|
||||
memtabler16[0x7E] = wramaccessbankr16; // 7E
|
||||
memtabler16[0x7F] = eramaccessbankr16; // 7F
|
||||
rep_stosd(memtabler16+0x80, regaccessbankr16, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler16+0xC0, memaccessbankr16, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit write memory tables banks
|
||||
rep_stosd(memtablew16+0x00, regaccessbankw16, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew16+0x40, memaccessbankw16, 0x30); // 40 - 6F
|
||||
rep_stosd(memtablew16+0x70, sramaccessbankw16, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew16+0x78, memaccessbankw16, 0x06); // 78 - 7D
|
||||
memtablew16[0x7E] = wramaccessbankw16; // 7E
|
||||
memtablew16[0x7F] = eramaccessbankw16; // 7F
|
||||
rep_stosd(memtablew16+0x80, regaccessbankw16, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew16+0xC0, memaccessbankw16, 0x40); // C0 - FF
|
||||
}
|
||||
|
||||
void SetAddressingModesSA1()
|
||||
{
|
||||
// set 8-bit read memory tables banks
|
||||
rep_stosd(memtabler8+0x00, regaccessbankr8SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler8+0x40, SA1RAMaccessbankr8, 0x20); // 40 - 5F
|
||||
rep_stosd(memtabler8+0x60, SA1RAMaccessbankr8b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtabler8+0x70, sramaccessbankr8, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler8+0x78, memaccessbankr8, 0x06); // 78 - 7D
|
||||
memtabler8[0x7E] = wramaccessbankr8; // 7E
|
||||
memtabler8[0x7F] = eramaccessbankr8; // 7F
|
||||
rep_stosd(memtabler8+0x80, regaccessbankr8SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler8+0xC0, memaccessbankr8, 0x40); // C0 - FF
|
||||
|
||||
// set 8-bit write memory tables banks
|
||||
rep_stosd(memtablew8+0x00, regaccessbankw8SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew8+0x40, SA1RAMaccessbankw8, 0x20); // 40 - 5F
|
||||
rep_stosd(memtablew8+0x60, SA1RAMaccessbankw8b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtablew8+0x70, sramaccessbankw8, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew8+0x78, memaccessbankw8, 0x06); // 78 - 7D
|
||||
memtablew8[0x7E] = wramaccessbankw8; // 7E
|
||||
memtablew8[0x7F] = eramaccessbankw8; // 7F
|
||||
rep_stosd(memtablew8+0x80, regaccessbankw8SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew8+0xC0, memaccessbankw8, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit read memory tables banks
|
||||
rep_stosd(memtabler16+0x00, regaccessbankr16SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler16+0x40, SA1RAMaccessbankr16, 0x20); // 40 - 5F
|
||||
rep_stosd(memtabler16+0x60, SA1RAMaccessbankr16b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtabler16+0x70, sramaccessbankr16, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler16+0x78, memaccessbankr16, 0x06); // 78 - 7D
|
||||
memtabler16[0x7E] = wramaccessbankr16; // 7E
|
||||
memtabler16[0x7F] = eramaccessbankr16; // 7F
|
||||
rep_stosd(memtabler16+0x80, regaccessbankr16SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler16+0xC0, memaccessbankr16, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit write memory tables banks
|
||||
rep_stosd(memtablew16+0x00, regaccessbankw16SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew16+0x40, SA1RAMaccessbankw16, 0x20); // 40 - 5F
|
||||
rep_stosd(memtablew16+0x60, SA1RAMaccessbankw16b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtablew16+0x70, sramaccessbankw16, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew16+0x78, memaccessbankw16, 0x06); // 78 - 7D
|
||||
memtablew16[0x7E] = wramaccessbankw16; // 7E
|
||||
memtablew16[0x7F] = eramaccessbankw16; // 7F
|
||||
rep_stosd(memtablew16+0x80, regaccessbankw16SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew16+0xC0, memaccessbankw16, 0x40); // C0 - FF
|
||||
}
|
||||
|
||||
void membank0r8ram(), membank0r8ramSA1();
|
||||
void membank0r8reg(), membank0r8inv(), membank0r8chip();
|
||||
void membank0r8rom(), membank0r8romram();
|
||||
|
||||
void membank0w8ram(), membank0w8ramSA1();
|
||||
void membank0w8reg(), membank0w8inv(), membank0w8chip();
|
||||
void membank0w8rom(), membank0w8romram();
|
||||
|
||||
void membank0r16ram(), membank0r16ramSA1();
|
||||
void membank0r16reg(), membank0r16inv(), membank0r16chip();
|
||||
void membank0r16rom(), membank0r16romram();
|
||||
|
||||
void membank0w16ram(), membank0w16ramSA1();
|
||||
void membank0w16reg(), membank0w16inv(), membank0w16chip();
|
||||
void membank0w16rom(), membank0w16romram();
|
||||
|
||||
void GenerateBank0Table()
|
||||
{
|
||||
rep_stosd(Bank0datr8+0x00, membank0r8ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr8+0x20, membank0r8reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datr8+0x48, membank0r8inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datr8+0x5F, membank0r8chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datr8+0x7E, membank0r8rom, 0x81); // 7E - FE
|
||||
Bank0datr8[0xFF] = membank0r8romram; // FF
|
||||
|
||||
rep_stosd(Bank0datw8+0x00, membank0w8ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw8+0x20, membank0w8reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datw8+0x48, membank0w8inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datw8+0x5F, membank0w8chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datw8+0x7E, membank0w8rom, 0x81); // 7E - FE
|
||||
Bank0datw8[0xFF] = membank0w8romram; // FF
|
||||
|
||||
rep_stosd(Bank0datr16+0x00, membank0r16ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr16+0x20, membank0r16reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datr16+0x48, membank0r16inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datr16+0x5F, membank0r16chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datr16+0x7E, membank0r16rom, 0x81); // 7E - FE
|
||||
Bank0datr16[0xFF] = membank0r16romram; // FF
|
||||
|
||||
rep_stosd(Bank0datw16+0x00, membank0w16ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw16+0x20, membank0w16reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datw16+0x48, membank0w16inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datw16+0x5F, membank0w16chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datw16+0x7E, membank0w16rom, 0x81); // 7E - FE
|
||||
Bank0datw16[0xFF] = membank0w16romram; // FF
|
||||
}
|
||||
|
||||
void GenerateBank0TableSA1()
|
||||
{
|
||||
rep_stosd(Bank0datr8, membank0r8ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw8, membank0w8ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr16, membank0r16ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw16, membank0w16ramSA1, 0x20); // 00 - 1F
|
||||
}
|
||||
@@ -20,9 +20,6 @@
|
||||
|
||||
%include "macros.mac"
|
||||
|
||||
EXTSYM eramaccessbankr16,eramaccessbankr8,eramaccessbankw16
|
||||
EXTSYM eramaccessbankw8,memaccessbankr16,memaccessbankr8
|
||||
EXTSYM memaccessbankw16,memaccessbankw8
|
||||
EXTSYM mosjmptab,mosdraw10,mosdraw11,mosdraw12,mosdraw13
|
||||
EXTSYM mosdraw14,mosdraw15,mosdraw16,mosdraw2,mosdraw3
|
||||
EXTSYM mosdraw4,mosdraw5,mosdraw6,mosdraw7,mosdraw8
|
||||
@@ -43,16 +40,7 @@ EXTSYM mosjmptab16bntms,mosdraw1016bntms,mosdraw1116bntms,mosdraw1216bntms,mosdr
|
||||
EXTSYM mosdraw1416bntms,mosdraw1516bntms,mosdraw1616bntms,mosdraw216bntms,mosdraw316bntms
|
||||
EXTSYM mosdraw416bntms,mosdraw516bntms,mosdraw616bntms,mosdraw716bntms,mosdraw816bntms
|
||||
EXTSYM mosdraw916bntms
|
||||
EXTSYM regaccessbankr16,regaccessbankw16,regaccessbankw8
|
||||
EXTSYM sramaccessbankr16,sramaccessbankr8,sramaccessbankw16
|
||||
EXTSYM sramaccessbankw8,tableA,tableB,tableC,tableD,tableE
|
||||
EXTSYM tableF,tableG,tableH,wramaccessbankr16
|
||||
EXTSYM wramaccessbankr8,wramaccessbankw16,wramaccessbankw8
|
||||
EXTSYM regaccessbankr8SA1,regaccessbankr16SA1,regaccessbankw8SA1
|
||||
EXTSYM regaccessbankw16SA1,SA1RAMaccessbankr8,SA1RAMaccessbankr16
|
||||
EXTSYM SA1RAMaccessbankw8,SA1RAMaccessbankw16
|
||||
EXTSYM SA1RAMaccessbankr8b,SA1RAMaccessbankr16b
|
||||
EXTSYM SA1RAMaccessbankw8b,SA1RAMaccessbankw16b
|
||||
EXTSYM tableA,tableB,tableC,tableD,tableE,tableF,tableG,tableH
|
||||
EXTSYM DPageR8,DPageW8,DPageR16,DPageW16
|
||||
EXTSYM SDD1Enable
|
||||
EXTSYM JoyAOrig,JoyANow,JoyBOrig,JoyBNow,JoyCOrig,JoyCNow,JoyDOrig,JoyDNow
|
||||
@@ -77,12 +65,12 @@ section .data
|
||||
;tableF times 256 dd 0 ; Table addresses (M:1,X:0,D:1)
|
||||
;tableG times 256 dd 0 ; Table addresses (M:0,X:1,D:1)
|
||||
;tableH times 256 dd 0 ; Table addresses (M:1,X:1,D:1)
|
||||
NEWSYM addrmdef, times 27 dd 0 ; Address modes
|
||||
NEWSYM addrmdef, times 27 dd 0 ; Address modes
|
||||
;tablead times 256 dd 0 ; Table address location according to P
|
||||
;memtabler8 times 256 dd 0 ; Memory Bank Locations for reading 8-bit
|
||||
;memtablew8 times 256 dd 0 ; Memory Bank Locations for writing 8-bit
|
||||
;memtabler16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtablew16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtabler16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtablew16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
|
||||
section .text
|
||||
|
||||
@@ -332,286 +320,6 @@ NEWSYM inittable
|
||||
pop es
|
||||
ret
|
||||
|
||||
NEWSYM SetAddressingModes
|
||||
; set 8-bit read memory tables
|
||||
mov edi,memtabler8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 8-bit write memory tables
|
||||
mov edi,memtablew8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit read memory tables
|
||||
mov edi,memtabler16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit write memory tables
|
||||
mov edi,memtablew16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
ret
|
||||
|
||||
NEWSYM SetAddressingModesSA1
|
||||
; set 8-bit read memory tables
|
||||
mov edi,memtabler8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankr8
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankr8b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 8-bit write memory tables
|
||||
mov edi,memtablew8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankw8
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankw8b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit read memory tables
|
||||
mov edi,memtabler16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankr16
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankr16b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit write memory tables
|
||||
mov edi,memtablew16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankw16
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankw16b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
ret
|
||||
|
||||
eopINVALID
|
||||
ret
|
||||
|
||||
@@ -637,22 +345,22 @@ NEWSYM cpucycle
|
||||
db 2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5
|
||||
db 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5
|
||||
db 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5
|
||||
; | 2 8 | 2 6 | 2 8 | 2 4 | 2 5 | 2 3 | 2 5 | 2 6 | 1 3 | 2 2 | 1 2 | 1 4 | 3 6 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 5 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 3 6 | 2 6 | 4 8 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 4 | 2 2 | 1 2 | 1 5 | 3 4 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 4 | 3 4 | 3 7 | 4 5 |
|
||||
; | 1 7 | 2 6 | 2 2 | 2 4 | 3 7 | 2 3 | 2 5 | 2 6 | 1 3 | 2 2 | 1 2 | 1 3 | 3 3 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 3 7 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 3 | 1 2 | 4 4 | 3 4 | 3 7 | 4 5 |
|
||||
; | 1 6 | 2 6 | 3 6 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 4 | 2 2 | 1 2 | 1 6 | 3 5 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 4 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 2 2 | 2 6 | 3 3 | 2 4 | 2 3 | 2 3 | 2 3 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 5 | 2 7 | 2 4 | 2 4 | 2 4 | 2 6 | 1 2 | 3 5 | 1 2 | 1 2 | 3 4 | 3 5 | 3 5 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 2 | 2 4 | 2 3 | 2 3 | 2 3 | 2 6 | 1 2 | 2 2 | 1 2 | 1 4 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 4 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 3 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 6 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 3 | 1 3 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 3 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 3 5 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 4 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; 28 | 26 | 28 | 24 | 25 | 23 | 25 | 26 | 13 | 22 | 12 | 14 | 36 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 25 | 24 | 26 | 26 | 12 | 34 | 12 | 12 | 36 | 34 | 37 | 45
|
||||
; 36 | 26 | 48 | 24 | 23 | 23 | 25 | 26 | 14 | 22 | 12 | 15 | 34 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 26 | 26 | 12 | 34 | 12 | 12 | 34 | 34 | 37 | 45
|
||||
; 17 | 26 | 22 | 24 | 37 | 23 | 25 | 26 | 13 | 22 | 12 | 13 | 33 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 37 | 24 | 26 | 26 | 12 | 34 | 13 | 12 | 44 | 34 | 37 | 45
|
||||
; 16 | 26 | 36 | 24 | 23 | 23 | 25 | 26 | 14 | 22 | 12 | 16 | 35 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 26 | 26 | 12 | 34 | 14 | 12 | 36 | 34 | 37 | 45
|
||||
; 22 | 26 | 33 | 24 | 23 | 23 | 23 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 34 | 45
|
||||
; 22 | 26 | 25 | 27 | 24 | 24 | 24 | 26 | 12 | 35 | 12 | 12 | 34 | 35 | 35 | 45
|
||||
; 22 | 26 | 22 | 24 | 23 | 23 | 23 | 26 | 12 | 22 | 12 | 14 | 34 | 34 | 34 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 24 | 26 | 12 | 34 | 12 | 12 | 34 | 34 | 34 | 45
|
||||
; 22 | 26 | 23 | 24 | 23 | 23 | 25 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 34 | 45
|
||||
; 22 | 25 | 25 | 27 | 26 | 24 | 26 | 26 | 12 | 34 | 13 | 13 | 36 | 34 | 37 | 45
|
||||
; 22 | 26 | 23 | 24 | 23 | 23 | 25 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 35 | 24 | 26 | 26 | 12 | 34 | 14 | 12 | 36 | 34 | 37 | 45
|
||||
|
||||
section .text
|
||||
|
||||
@@ -1193,5 +901,3 @@ NEWSYM settableDm16
|
||||
mov dword[edi+0FDh*4],COpFDm16d
|
||||
mov dword[edi+0FFh*4],COpFFm16d
|
||||
ret
|
||||
|
||||
|
||||
|
||||
@@ -39,7 +39,7 @@ EXTSYM spcnumread
|
||||
EXTSYM Curtableaddr,fnamest,procexecloop,stateloader,tableA
|
||||
EXTSYM vidmemch2
|
||||
EXTSYM statesaver
|
||||
EXTSYM memtablew8,printhex8,writeon,SetAddressingModesSA1
|
||||
EXTSYM memtablew8,printhex8,writeon
|
||||
EXTSYM curcyc,dmadata,execsingle,initaddrl,memtabler8,pdh
|
||||
EXTSYM regaccessbankr8,selcB800,snesmap2,snesmmap
|
||||
EXTSYM ram7f
|
||||
|
||||
@@ -33,12 +33,13 @@ extern unsigned int spcnumread, spchalted, opcd, HIRQCycNext, oamaddr;
|
||||
extern unsigned int SfxR0, *setaramdata, ramsize, *sram;
|
||||
extern unsigned int tempesi, tempedi, tempedx, tempebp;
|
||||
extern unsigned int SPCMultA, PHnum2writespc7110reg, PHdspsave2;
|
||||
extern unsigned char sndrot, spcRam[65472];
|
||||
extern unsigned char DSPMem[256], SA1Status, *SA1RAMArea, DSP1Type, DSP1COp;
|
||||
extern unsigned char prevoamptr, BRRBuffer[32], *romdata, curcyc, echoon0;
|
||||
extern unsigned char sndrot, spcRam[65472], DSPMem[256], SA1Status, *SA1RAMArea;
|
||||
extern unsigned char DSP1Type, DSP1COp, prevoamptr, BRRBuffer[32], *romdata;
|
||||
extern unsigned char curcyc, echoon0;
|
||||
extern unsigned char vidmemch4[4096], vidmemch8[4096], vidmemch2[4096];
|
||||
|
||||
extern bool C4Enable, SFXEnable, SA1Enable, SPC7110Enable, SETAEnable, spcon, SRAMState;
|
||||
extern bool C4Enable, SFXEnable, SA1Enable, SPC7110Enable, SETAEnable, spcon;
|
||||
extern bool SRAMState;
|
||||
|
||||
extern short C4WFXVal, C41FXVal, Op00Multiplicand, Op04Angle, Op08X, Op18X;
|
||||
extern short Op28X, Op0CA, Op02FX, Op0AVS, Op06X, Op01m, Op0DX, Op03F, Op14Zr;
|
||||
|
||||
@@ -24,21 +24,18 @@ EXTSYM DosExit,UpdateDevices,InitSPC,Makemode7Table,MusicRelVol,MusicVol
|
||||
EXTSYM makesprprtable,romloadskip,start65816,startdebugger,SfxR0
|
||||
EXTSYM showinfogui
|
||||
EXTSYM filefound,inittable,SA1inittable
|
||||
EXTSYM MessageOn,Msgptr,MsgCount,sndrot,GenerateBank0Table,SnowTimer
|
||||
EXTSYM MessageOn,Msgptr,MsgCount,sndrot,SnowTimer
|
||||
EXTSYM inittableb,inittablec,newgfx16b,cfgreinittime
|
||||
EXTSYM Open_File,Read_File,Write_File,Close_File,Output_Text,Get_Key,CNetType
|
||||
EXTSYM Delete_File,Get_First_Entry,Get_Next_Entry,Change_Dir,InitDSP
|
||||
EXTSYM Remove_Dir,Change_Single_Dir,Create_Dir,Get_Memfree,Create_File
|
||||
EXTSYM SPCDisable,osm2dis,CurRecv,BackupSystemVars
|
||||
EXTSYM SnowData,SnowVelDist
|
||||
EXTSYM cvidmode, newengen, cfgnewgfx, GUI16VID
|
||||
EXTSYM NewEngEnForce
|
||||
EXTSYM PrintChar
|
||||
EXTSYM TextFile
|
||||
EXTSYM cvidmode,newengen,cfgnewgfx,GUI16VID,NewEngEnForce
|
||||
EXTSYM PrintChar,TextFile
|
||||
EXTSYM Setper2exec,per2exec
|
||||
EXTSYM chaton
|
||||
EXTSYM JoyRead,JoyReadControl,joy4218,joy4219
|
||||
EXTSYM joy421A,joy421B,pressed
|
||||
EXTSYM JoyRead,JoyReadControl,joy4218,joy4219,joy421A,joy421B,pressed
|
||||
EXTSYM pl3Ak,pl3Bk,pl3Lk,pl3Rk,pl3Xk,pl1p209,pl2p209,pl3p209,pl4p209
|
||||
EXTSYM pl3Yk,pl3contrl,pl3downk,pl3leftk,pl3rightk,pl3selk,pl3startk
|
||||
EXTSYM pl3upk,pl4Ak,pl4Bk,pl4Lk,pl4Rk,pl4Xk,pl4Yk,pl4contrl,pl4downk
|
||||
@@ -52,12 +49,12 @@ EXTSYM pl3Xtk,pl3Ytk,pl3Atk,pl3Btk,pl4Xtk,pl4Ytk,pl4Atk,pl4Btk
|
||||
EXTSYM pl1ULk,pl1URk,pl1DLk,pl1DRk,pl2ULk,pl2URk,pl2DLk,pl2DRk
|
||||
EXTSYM pl3ULk,pl3URk,pl3DLk,pl3DRk,pl4ULk,pl4URk,pl4DLk,pl4DRk
|
||||
EXTSYM pl5ULk,pl5URk,pl5DLk,pl5DRk,pl5Xtk,pl5Ytk,pl5Atk,pl5Btk
|
||||
EXTSYM pl1Ltk,pl1Rtk,pl2Ltk,pl2Rtk,pl3Ltk,pl3Rtk,pl4Ltk,pl4Rtk,pl5Ltk,pl5Rtk
|
||||
EXTSYM Turbo30hz,nojoystickpoll
|
||||
EXTSYM NumComboLocl,ComboBlHeader,ComboHeader,CombinDataLocl
|
||||
EXTSYM CombinDataGlob,NumCombo,GUIComboGameSpec
|
||||
EXTSYM mousexloc,mouseyloc
|
||||
EXTSYM extlatch
|
||||
EXTSYM BackState
|
||||
EXTSYM extlatch,BackState
|
||||
EXTSYM FIRTAPVal0,FIRTAPVal1,FIRTAPVal2,FIRTAPVal3,FIRTAPVal4
|
||||
EXTSYM FIRTAPVal5,FIRTAPVal6,FIRTAPVal7,INTEnab,JoyAPos,JoyBPos
|
||||
EXTSYM NMIEnab,SPCROM,VIRQLoc,coladdb,coladdg,coladdr,doirqnext
|
||||
@@ -68,31 +65,23 @@ EXTSYM opexec358cphb,prevoamptr,reg1read,reg2read,reg3read
|
||||
EXTSYM reg4read,resolutn,romdata,scrndis,spcP,spcRam
|
||||
EXTSYM spcnumread,spchalted,tableD,timeron,vidbright,OldGfxMode2
|
||||
EXTSYM SPC700read,SPC700write,GUIDoReset,spc700read,GUIReset
|
||||
EXTSYM InitC4,SA1Reset,SetAddressingModesSA1,SetAddressingModes,SDD1BankA,SPC7110init
|
||||
EXTSYM RTCinit,InitOBC
|
||||
EXTSYM memaccessspc7110r8,memaccessspc7110r16,memaccessspc7110w8
|
||||
EXTSYM memaccessspc7110w16
|
||||
EXTSYM InitC4,SA1Reset,SetAddressingModesSA1,SDD1BankA
|
||||
EXTSYM SPC7110init,RTCinit,InitOBC
|
||||
EXTSYM memaccessspc7110r8,memaccessspc7110r16
|
||||
EXTSYM memaccessspc7110w8,memaccessspc7110w16
|
||||
EXTSYM ram7f,snesmap2,snesmmap,sram,MultiTap
|
||||
EXTSYM memaccessbankr848mb,memaccessbankr1648mb
|
||||
EXTSYM cpuover,execloop,procexecloop
|
||||
;EXTSYM execloopn,execloopns,execloops
|
||||
;EXTSYM PHsizeofexecloop,PHsizeofexecloopn,PHsizeofexecloopns
|
||||
;EXTSYM PHsizeofexecloops
|
||||
EXTSYM curexecstate
|
||||
EXTSYM debugdisble,vidbuffer
|
||||
EXTSYM cpuover,execloop,procexecloop,curexecstate,debugdisble,vidbuffer
|
||||
EXTSYM Sup16mbit,Sup48mbit,debugbufa,pal16b,pal16bcl,pal16bclha
|
||||
EXTSYM pal16bxcl,ram7fa,regptra,regptwa,srama,vidmemch2,vidmemch4
|
||||
EXTSYM vidmemch8,vcache2b,vcache4b,vcache8b,vram,wramdata
|
||||
EXTSYM wramdataa
|
||||
EXTSYM fname,fnames,GetCurDir
|
||||
EXTSYM GUIcurrentdir,PrintStr
|
||||
EXTSYM vidmemch8,vcache2b,vcache4b,vcache8b,vram,wramdata,wramdataa
|
||||
EXTSYM fname,fnames,GetCurDir,GUIcurrentdir,PrintStr
|
||||
;STUB DDOI
|
||||
;EXTSYM GUIcurrentdir, PrintStr
|
||||
EXTSYM DTALoc
|
||||
EXTSYM spc7110romptr,allocspc7110
|
||||
EXTSYM SRAMChdir,cfgloadsdir,fnamest,statefileloc
|
||||
EXTSYM ForcePal,ForceROMTiming,ForceHiLoROM,InitDir,InitDrive,enterpress,frameskip
|
||||
EXTSYM maxromspace,curromspace,infoloc, patchfile
|
||||
;EXTSYM GUIcurrentdir,PrintStr
|
||||
EXTSYM DTALoc,spc7110romptr,allocspc7110
|
||||
EXTSYM SRAMChdir,cfgloadsdir,fnamest,statefileloc,frameskip
|
||||
EXTSYM ForcePal,ForceROMTiming,ForceHiLoROM,InitDir,InitDrive,enterpress
|
||||
EXTSYM maxromspace,curromspace,infoloc,patchfile
|
||||
EXTSYM gotoroot,headdata,printnum,romispal
|
||||
EXTSYM InitFxTables,SfxR1,SfxR2,SfxSCMR,SfxSFR,finterleave
|
||||
EXTSYM initregr,initregw,memtabler16,DSP1Read16b3F,memaccessbankr16
|
||||
@@ -101,49 +90,34 @@ EXTSYM memaccessbankw16,memtablew8,DSP1Write8b,memaccessbankw8,DSP1Write16b3F
|
||||
EXTSYM regaccessbankr16,regaccessbankr8,regaccessbankw16,regaccessbankw8
|
||||
EXTSYM sfxaccessbankr16,sfxaccessbankr16b,sfxaccessbankr16c,DSP1Write8b3F
|
||||
EXTSYM sfxaccessbankr16d,sfxaccessbankr8,sfxaccessbankr8b,sfxaccessbankr8c
|
||||
EXTSYM sfxaccessbankr8d,sfxaccessbankw16,sfxaccessbankw16b
|
||||
EXTSYM sfxaccessbankw16c,sfxaccessbankw16d,sfxaccessbankw8
|
||||
EXTSYM sfxaccessbankw8b,sfxaccessbankw8c,sfxaccessbankw8d,sfxramdata
|
||||
EXTSYM sramaccessbankr16,sramaccessbankr16s,sramaccessbankr8
|
||||
EXTSYM sramaccessbankr8s,sramaccessbankw16,sramaccessbankw16s
|
||||
EXTSYM sramaccessbankw8,sramaccessbankw8s,GenerateBank0TableSA1
|
||||
EXTSYM sfxaccessbankr8d,sfxaccessbankw16,sfxaccessbankw16b,sfxaccessbankw16c
|
||||
EXTSYM sfxaccessbankw16d,sfxaccessbankw8,sfxaccessbankw8b,sfxaccessbankw8c
|
||||
EXTSYM sfxaccessbankw8d,sfxramdata
|
||||
EXTSYM sramaccessbankr16,sramaccessbankr16s,sramaccessbankr8,sramaccessbankr8s
|
||||
EXTSYM sramaccessbankw16,sramaccessbankw16s,sramaccessbankw8,sramaccessbankw8s
|
||||
EXTSYM ScrDispl,wramreadptr,wramwriteptr
|
||||
EXTSYM pl1Ltk,pl1Rtk,pl2Ltk,pl2Rtk,pl3Ltk,pl3Rtk,pl4Ltk,pl4Rtk,pl5Ltk,pl5Rtk
|
||||
EXTSYM loadstate2, headerhack
|
||||
EXTSYM loadstate2,headerhack
|
||||
|
||||
;initc.c
|
||||
EXTSYM chip_detect
|
||||
EXTSYM clearmem,clearSPCRAM
|
||||
EXTSYM PatchUsingIPS
|
||||
EXTSYM loadZipFile
|
||||
EXTSYM ZOpenFileName
|
||||
EXTSYM loadROM
|
||||
EXTSYM CalcChecksum
|
||||
EXTSYM BankCheck
|
||||
EXTSYM MirrorROM
|
||||
EXTSYM SplittedROM
|
||||
EXTSYM addOnStart
|
||||
EXTSYM addOnSize
|
||||
EXTSYM SPC7PackIndexLoad,SPC7110IndexSize
|
||||
EXTSYM DumpROMLoadInfo
|
||||
EXTSYM SetupSramSize
|
||||
EXTSYM IntlEHi
|
||||
EXTSYM CHIPBATT,SFXEnable,C4Enable,SPC7110Enable,RTCEnable,SA1Enable,SDD1Enable,OBCEnable
|
||||
EXTSYM SETAEnable,ST18Enable,SGBEnable,DSP1Enable,DSP2Enable,DSP3Enable,DSP4Enable,BSEnable
|
||||
EXTSYM clearvidsound
|
||||
EXTSYM clearmem,clearSPCRAM,PatchUsingIPS,loadZipFile,ZOpenFileName
|
||||
EXTSYM loadROM,CalcChecksum,BankCheck,MirrorROM,SplittedROM,addOnStart,addOnSize
|
||||
EXTSYM SPC7PackIndexLoad,SPC7110IndexSize,DumpROMLoadInfo,SetupSramSize,IntlEHi
|
||||
EXTSYM CHIPBATT,SETAEnable,C4Enable,SPC7110Enable,RTCEnable,SA1Enable,SDD1Enable
|
||||
EXTSYM OBCEnable,SFXEnable,ST18Enable,SGBEnable,DSP1Enable,DSP2Enable,DSP3Enable
|
||||
EXTSYM DSP4Enable,BSEnable,clearvidsound
|
||||
|
||||
EXTSYM calculate_state_sizes,InitRewindVars
|
||||
|
||||
EXTSYM SetaCmdEnable,setaramdata
|
||||
EXTSYM setaaccessbankr8,setaaccessbankw8,setaaccessbankr8a,setaaccessbankw8a
|
||||
EXTSYM setaaccessbankr16,setaaccessbankw16,setaaccessbankr16a,setaaccessbankw16a
|
||||
|
||||
EXTSYM DSP2Read8b,DSP2Read16b,DSP2Write8b,DSP2Write16b,InitDSP2
|
||||
|
||||
EXTSYM DSP4Read8b,DSP4Read16b,DSP4Write8b,DSP4Write16b,InitDSP4
|
||||
|
||||
EXTSYM SetupROMc
|
||||
|
||||
%ifdef __LINUX__
|
||||
EXTSYM LoadDir, popdir, pushdir
|
||||
EXTSYM LoadDir,popdir,pushdir
|
||||
%endif
|
||||
|
||||
; Initiation
|
||||
@@ -365,7 +339,6 @@ EndMessageB
|
||||
|
||||
SECTION .data
|
||||
|
||||
|
||||
; Controls
|
||||
;FIXME: define pl3contrl, pl4contrl and pl5contrl here?
|
||||
;Christophe 2001/03/10
|
||||
@@ -452,8 +425,8 @@ NEWSYM intrset, db 0 ; interrupt set
|
||||
NEWSYM cycpl, db 0 ; cycles per scanline
|
||||
NEWSYM cycphb, db 0 ; cycles per hblank
|
||||
NEWSYM spcon, db 0 ; SPC Enable (1=enabled)
|
||||
NEWSYM stackand, dw 01FFh ; value to and stack to keep it from going to the wrong area
|
||||
NEWSYM stackor, dw 0100h ; value to or stack to keep it from going to the wrong area
|
||||
NEWSYM stackand,dw 01FFh; value to and stack to keep it from going to the wrong area
|
||||
NEWSYM stackor, dw 0100h; value to or stack to keep it from going to the wrong area
|
||||
|
||||
; 65816 registers
|
||||
|
||||
@@ -508,10 +481,11 @@ NEWSYM Sflagnz, dd 0
|
||||
NEWSYM Sflago, dd 0
|
||||
NEWSYM Sflagc, dd 0
|
||||
|
||||
ebm db 166,95,66,223,17,11,103,180,156,68,108,120,138,55,203,205,178,210,39,252,128,66
|
||||
db 65,167,155,151,197,125,176,66,73,230,61,210,7,137,152,110,203,241,50,89,70,29,176
|
||||
db 42,99,167,155,92,3,221,224,54,53,167,155,211,70,205,138,202,91,234,178,80,229,13,10
|
||||
|
||||
ebm db 166,95,66,223,17,11,103,180,156,68,108,120,138,55,203,205
|
||||
db 178,210,39,252,128,66,65,167,155,151,197,125,176,66,73,230
|
||||
db 61,210,7,137,152,110,203,241,50,89,70,29,176,42,99,167
|
||||
db 155,92,3,221,224,54,53,167,155,211,70,205,138,202,91,234
|
||||
db 178,80,229,13,10
|
||||
|
||||
SECTION .text
|
||||
|
||||
@@ -1059,7 +1033,7 @@ NEWSYM hdmaearlstart, db 0
|
||||
NEWSYM hdmadelay, db 0
|
||||
NEWSYM dracxhack, db 0
|
||||
NEWSYM disable65816sh, db 0
|
||||
NEWSYM disablespcclr , db 0
|
||||
NEWSYM disablespcclr, db 0
|
||||
NEWSYM virqnodisable, db 0
|
||||
NEWSYM numspcvblleft, dd 0
|
||||
NEWSYM spc700idle, dd 0
|
||||
@@ -1108,7 +1082,9 @@ NEWSYM init65816
|
||||
cmp byte[SA1Enable],0
|
||||
je .nosa1init
|
||||
call SA1Reset
|
||||
pushad
|
||||
call SetAddressingModesSA1
|
||||
popad
|
||||
.nosa1init
|
||||
cmp byte[OBCEnable],0
|
||||
je .noobcinit
|
||||
@@ -2349,7 +2325,7 @@ SECTION .bss
|
||||
|
||||
|
||||
NEWSYM Checksumvalue, resw 1
|
||||
NEWSYM Checksumvalue2, resw 1 ;This is outdated, but needed for the command line loader
|
||||
NEWSYM Checksumvalue2, resw 1 ;outdated, but needed for the command line loader
|
||||
NEWSYM CRC32, resd 1
|
||||
NEWSYM SramExists, resb 1
|
||||
NEWSYM NumofBanks, resd 1
|
||||
@@ -2521,7 +2497,6 @@ NEWSYM GUIloadfailed, resb 1
|
||||
|
||||
SECTION .text
|
||||
|
||||
|
||||
NEWSYM convertsram
|
||||
cmp byte[cfgloadsdir],1
|
||||
je .sdrivechange
|
||||
@@ -2604,51 +2579,6 @@ NEWSYM CSStatus, db ' TYPE: ',0
|
||||
NEWSYM CSStatus2, db 'INTERLEAVED: BANK: CHKSUM: ',0
|
||||
NEWSYM CSStatus3, db 'VIDEO: CRC32: ',0
|
||||
|
||||
NEWSYM crc32_table,
|
||||
dd 000000000h, 077073096h, 0ee0e612ch, 0990951bah, 0076dc419h, 0706af48fh
|
||||
dd 0e963a535h, 09e6495a3h, 00edb8832h, 079dcb8a4h, 0e0d5e91eh, 097d2d988h
|
||||
dd 009b64c2bh, 07eb17cbdh, 0e7b82d07h, 090bf1d91h, 01db71064h, 06ab020f2h
|
||||
dd 0f3b97148h, 084be41deh, 01adad47dh, 06ddde4ebh, 0f4d4b551h, 083d385c7h
|
||||
dd 0136c9856h, 0646ba8c0h, 0fd62f97ah, 08a65c9ech, 014015c4fh, 063066cd9h
|
||||
dd 0fa0f3d63h, 08d080df5h, 03b6e20c8h, 04c69105eh, 0d56041e4h, 0a2677172h
|
||||
dd 03c03e4d1h, 04b04d447h, 0d20d85fdh, 0a50ab56bh, 035b5a8fah, 042b2986ch
|
||||
dd 0dbbbc9d6h, 0acbcf940h, 032d86ce3h, 045df5c75h, 0dcd60dcfh, 0abd13d59h
|
||||
dd 026d930ach, 051de003ah, 0c8d75180h, 0bfd06116h, 021b4f4b5h, 056b3c423h
|
||||
dd 0cfba9599h, 0b8bda50fh, 02802b89eh, 05f058808h, 0c60cd9b2h, 0b10be924h
|
||||
dd 02f6f7c87h, 058684c11h, 0c1611dabh, 0b6662d3dh, 076dc4190h, 001db7106h
|
||||
dd 098d220bch, 0efd5102ah, 071b18589h, 006b6b51fh, 09fbfe4a5h, 0e8b8d433h
|
||||
dd 07807c9a2h, 00f00f934h, 09609a88eh, 0e10e9818h, 07f6a0dbbh, 0086d3d2dh
|
||||
dd 091646c97h, 0e6635c01h, 06b6b51f4h, 01c6c6162h, 0856530d8h, 0f262004eh
|
||||
dd 06c0695edh, 01b01a57bh, 08208f4c1h, 0f50fc457h, 065b0d9c6h, 012b7e950h
|
||||
dd 08bbeb8eah, 0fcb9887ch, 062dd1ddfh, 015da2d49h, 08cd37cf3h, 0fbd44c65h
|
||||
dd 04db26158h, 03ab551ceh, 0a3bc0074h, 0d4bb30e2h, 04adfa541h, 03dd895d7h
|
||||
dd 0a4d1c46dh, 0d3d6f4fbh, 04369e96ah, 0346ed9fch, 0ad678846h, 0da60b8d0h
|
||||
dd 044042d73h, 033031de5h, 0aa0a4c5fh, 0dd0d7cc9h, 05005713ch, 0270241aah
|
||||
dd 0be0b1010h, 0c90c2086h, 05768b525h, 0206f85b3h, 0b966d409h, 0ce61e49fh
|
||||
dd 05edef90eh, 029d9c998h, 0b0d09822h, 0c7d7a8b4h, 059b33d17h, 02eb40d81h
|
||||
dd 0b7bd5c3bh, 0c0ba6cadh, 0edb88320h, 09abfb3b6h, 003b6e20ch, 074b1d29ah
|
||||
dd 0ead54739h, 09dd277afh, 004db2615h, 073dc1683h, 0e3630b12h, 094643b84h
|
||||
dd 00d6d6a3eh, 07a6a5aa8h, 0e40ecf0bh, 09309ff9dh, 00a00ae27h, 07d079eb1h
|
||||
dd 0f00f9344h, 08708a3d2h, 01e01f268h, 06906c2feh, 0f762575dh, 0806567cbh
|
||||
dd 0196c3671h, 06e6b06e7h, 0fed41b76h, 089d32be0h, 010da7a5ah, 067dd4acch
|
||||
dd 0f9b9df6fh, 08ebeeff9h, 017b7be43h, 060b08ed5h, 0d6d6a3e8h, 0a1d1937eh
|
||||
dd 038d8c2c4h, 04fdff252h, 0d1bb67f1h, 0a6bc5767h, 03fb506ddh, 048b2364bh
|
||||
dd 0d80d2bdah, 0af0a1b4ch, 036034af6h, 041047a60h, 0df60efc3h, 0a867df55h
|
||||
dd 0316e8eefh, 04669be79h, 0cb61b38ch, 0bc66831ah, 0256fd2a0h, 05268e236h
|
||||
dd 0cc0c7795h, 0bb0b4703h, 0220216b9h, 05505262fh, 0c5ba3bbeh, 0b2bd0b28h
|
||||
dd 02bb45a92h, 05cb36a04h, 0c2d7ffa7h, 0b5d0cf31h, 02cd99e8bh, 05bdeae1dh
|
||||
dd 09b64c2b0h, 0ec63f226h, 0756aa39ch, 0026d930ah, 09c0906a9h, 0eb0e363fh
|
||||
dd 072076785h, 005005713h, 095bf4a82h, 0e2b87a14h, 07bb12baeh, 00cb61b38h
|
||||
dd 092d28e9bh, 0e5d5be0dh, 07cdcefb7h, 00bdbdf21h, 086d3d2d4h, 0f1d4e242h
|
||||
dd 068ddb3f8h, 01fda836eh, 081be16cdh, 0f6b9265bh, 06fb077e1h, 018b74777h
|
||||
dd 088085ae6h, 0ff0f6a70h, 066063bcah, 011010b5ch, 08f659effh, 0f862ae69h
|
||||
dd 0616bffd3h, 0166ccf45h, 0a00ae278h, 0d70dd2eeh, 04e048354h, 03903b3c2h
|
||||
dd 0a7672661h, 0d06016f7h, 04969474dh, 03e6e77dbh, 0aed16a4ah, 0d9d65adch
|
||||
dd 040df0b66h, 037d83bf0h, 0a9bcae53h, 0debb9ec5h, 047b2cf7fh, 030b5ffe9h
|
||||
dd 0bdbdf21ch, 0cabac28ah, 053b39330h, 024b4a3a6h, 0bad03605h, 0cdd70693h
|
||||
dd 054de5729h, 023d967bfh, 0b3667a2eh, 0c4614ab8h, 05d681b02h, 02a6f2b94h
|
||||
dd 0b40bbe37h, 0c30c8ea1h, 05a05df1bh, 02d02ef8dh
|
||||
|
||||
;*******************************************************
|
||||
; Show Information
|
||||
;*******************************************************
|
||||
@@ -2672,7 +2602,10 @@ SECTION .text
|
||||
EXTSYM ClearScreen, cbitmode, makepal
|
||||
|
||||
NEWSYM SetupROM
|
||||
call CheckROMType
|
||||
pushad
|
||||
call SetupROMc
|
||||
popad
|
||||
; call CheckROMType
|
||||
call SetIRQVectors
|
||||
call ClearScreen
|
||||
cmp byte[cbitmode],0
|
||||
@@ -2720,331 +2653,6 @@ NEWSYM SetupROM
|
||||
.nopal
|
||||
ret
|
||||
|
||||
NEWSYM CheckROMType
|
||||
pushad
|
||||
call BankCheck
|
||||
call MirrorROM
|
||||
popad
|
||||
|
||||
|
||||
mov byte[lorommapmode2],0
|
||||
mov esi,[romdata]
|
||||
cmp dword[esi+207FC0h],'DERB'
|
||||
jne .noderby96
|
||||
cmp dword[esi+207FC4h],'Y ST'
|
||||
jne .noderby96
|
||||
cmp dword[esi+207FC8h],'ALLI'
|
||||
jne .noderby96
|
||||
cmp dword[esi+207FCDh],'N 96'
|
||||
jne .noderby96
|
||||
mov byte[lorommapmode2],1
|
||||
.noderby96
|
||||
cmp dword[esi+7FC0h],'SOUN'
|
||||
jne .nosoundnovel
|
||||
cmp dword[esi+7FC4h],'D NO'
|
||||
jne .nosoundnovel
|
||||
cmp dword[esi+7FC8h],'VEL-'
|
||||
jne .nosoundnovel
|
||||
cmp dword[esi+7FCDh],'COOL'
|
||||
jne .nosoundnovel
|
||||
mov byte[lorommapmode2],1
|
||||
.nosoundnovel
|
||||
|
||||
jmp .skipall
|
||||
; scan for branches
|
||||
mov esi,06A5h
|
||||
add esi,[romdata]
|
||||
mov ecx,80h
|
||||
.loopcheck
|
||||
cmp byte[esi],48h
|
||||
je .yes
|
||||
cmp byte[esi],8Bh
|
||||
je .yes
|
||||
cmp byte[esi],0Bh
|
||||
je .yes
|
||||
cmp byte[esi],4Bh
|
||||
je .yes
|
||||
cmp byte[esi],08h
|
||||
je .yes
|
||||
cmp byte[esi],0DAh
|
||||
je .yes
|
||||
cmp byte[esi],5Ah
|
||||
je .yes
|
||||
jmp .no
|
||||
.yes
|
||||
pushad
|
||||
mov al,byte[esi]
|
||||
mov al,80h
|
||||
sub al,cl
|
||||
call printhex8
|
||||
popad
|
||||
.no
|
||||
add esi,8000h
|
||||
dec ecx
|
||||
jnz .loopcheck
|
||||
.skipall
|
||||
|
||||
call SetAddressingModes
|
||||
call GenerateBank0Table
|
||||
|
||||
pushad
|
||||
call chip_detect
|
||||
popad
|
||||
|
||||
;Setup some Memmapping
|
||||
mov byte[DSP1Type],0
|
||||
mov esi,[romdata]
|
||||
add esi,0FFC0h
|
||||
mov byte[disablespcclr],0
|
||||
mov eax,50205040h
|
||||
or eax,0A000302h
|
||||
cmp dword[esi],eax
|
||||
jne .nospcdis
|
||||
mov byte[disablespcclr],1
|
||||
.nospcdis
|
||||
; banks 0-3Fh
|
||||
mov dword[memtabler8+3Fh*4],regaccessbankr8
|
||||
mov dword[memtablew8+3Fh*4],regaccessbankw8
|
||||
mov dword[memtabler16+3Fh*4],regaccessbankr16
|
||||
mov dword[memtablew16+3Fh*4],regaccessbankw16
|
||||
mov dword[memtabler8+0BFh*4],regaccessbankr8
|
||||
mov dword[memtablew8+0BFh*4],regaccessbankw8
|
||||
mov dword[memtabler16+0BFh*4],regaccessbankr16
|
||||
mov dword[memtablew16+0BFh*4],regaccessbankw16
|
||||
mov dword[memtabler8+70h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+70h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+70h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+70h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+71h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+71h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+71h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+71h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+72h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+72h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+72h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+72h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+73h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+73h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+73h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+73h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+78h*4],memaccessbankr8
|
||||
mov dword[memtablew8+78h*4],memaccessbankw8
|
||||
mov dword[memtabler16+78h*4],memaccessbankr16
|
||||
mov dword[memtablew16+78h*4],memaccessbankw16
|
||||
mov dword[memtabler8+79h*4],memaccessbankr8
|
||||
mov dword[memtablew8+79h*4],memaccessbankw8
|
||||
mov dword[memtabler16+79h*4],memaccessbankr16
|
||||
mov dword[memtablew16+79h*4],memaccessbankw16
|
||||
|
||||
;LoROM SRAM mapping, but not on the S-DD1
|
||||
cmp byte[romtype],1
|
||||
jne near .notlorom
|
||||
cmp byte[SDD1Enable],1
|
||||
je near .notlorom
|
||||
mov dword[memtabler8+0F0h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+0F0h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+0F0h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+0F0h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+0F1h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+0F1h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+0F1h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+0F1h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+0F2h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+0F2h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+0F2h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+0F2h*4],sramaccessbankw16
|
||||
mov dword[memtabler8+0F3h*4],sramaccessbankr8
|
||||
mov dword[memtablew8+0F3h*4],sramaccessbankw8
|
||||
mov dword[memtabler16+0F3h*4],sramaccessbankr16
|
||||
mov dword[memtablew16+0F3h*4],sramaccessbankw16
|
||||
.notlorom
|
||||
|
||||
cmp byte[DSP1Enable],1
|
||||
je .initdsp
|
||||
cmp byte[DSP2Enable],1
|
||||
je .initdsp2
|
||||
cmp byte[DSP3Enable],1
|
||||
je .initdsp
|
||||
cmp byte[DSP4Enable],1
|
||||
jne .notDSP1Hi
|
||||
pushad
|
||||
call InitDSP4
|
||||
popad
|
||||
xor ecx,ecx
|
||||
.dsp4loop
|
||||
mov dword[memtabler8+30h*4+ecx],DSP4Read8b
|
||||
mov dword[memtablew8+30h*4+ecx],DSP4Write8b
|
||||
mov dword[memtabler16+30h*4+ecx],DSP4Read16b
|
||||
mov dword[memtablew16+30h*4+ecx],DSP4Write16b
|
||||
add ecx,4
|
||||
cmp ecx,1*4
|
||||
jne .dsp4loop
|
||||
jmp .notDSP1Hi
|
||||
.initdsp2
|
||||
call InitDSP2
|
||||
.initdsp
|
||||
pushad
|
||||
call InitDSP
|
||||
popad
|
||||
mov byte[DSP1Type],1
|
||||
cmp byte[romtype],2
|
||||
jne .notDSP1Hi
|
||||
mov byte[DSP1Type],2
|
||||
.notDSP1Hi
|
||||
|
||||
;Setup Super FX related stuff
|
||||
cmp byte[SFXEnable],1
|
||||
jne near .nosfx
|
||||
cmp byte[Sup48mbit],1
|
||||
je .sfxokay
|
||||
mov byte[yesoutofmemory],1
|
||||
jmp .nosfx
|
||||
.sfxokay
|
||||
mov dword[memtabler8+70h*4],sfxaccessbankr8
|
||||
mov dword[memtablew8+70h*4],sfxaccessbankw8
|
||||
mov dword[memtabler16+70h*4],sfxaccessbankr16
|
||||
mov dword[memtablew16+70h*4],sfxaccessbankw16
|
||||
mov dword[memtabler8+71h*4],sfxaccessbankr8b
|
||||
mov dword[memtablew8+71h*4],sfxaccessbankw8b
|
||||
mov dword[memtabler16+71h*4],sfxaccessbankr16b
|
||||
mov dword[memtablew16+71h*4],sfxaccessbankw16b
|
||||
mov dword[memtabler8+72h*4],sfxaccessbankr8c
|
||||
mov dword[memtablew8+72h*4],sfxaccessbankw8c
|
||||
mov dword[memtabler16+72h*4],sfxaccessbankr16c
|
||||
mov dword[memtablew16+72h*4],sfxaccessbankw16c
|
||||
mov dword[memtabler8+73h*4],sfxaccessbankr8d
|
||||
mov dword[memtablew8+73h*4],sfxaccessbankw8d
|
||||
mov dword[memtabler16+73h*4],sfxaccessbankr16d
|
||||
mov dword[memtablew16+73h*4],sfxaccessbankw16d
|
||||
mov dword[memtabler8+78h*4],sramaccessbankr8s
|
||||
mov dword[memtablew8+78h*4],sramaccessbankw8s
|
||||
mov dword[memtabler16+78h*4],sramaccessbankr16s
|
||||
mov dword[memtablew16+78h*4],sramaccessbankw16s
|
||||
mov dword[memtabler8+79h*4],sramaccessbankr8s
|
||||
mov dword[memtablew8+79h*4],sramaccessbankw8s
|
||||
mov dword[memtabler16+79h*4],sramaccessbankr16s
|
||||
mov dword[memtablew16+79h*4],sramaccessbankw16s
|
||||
mov dword[SfxR1],0
|
||||
mov dword[SfxR2],0
|
||||
mov esi,[sfxramdata]
|
||||
mov ecx,65536
|
||||
.loopsfxclear
|
||||
mov dword[esi],0
|
||||
add esi,4
|
||||
dec ecx
|
||||
jnz .loopsfxclear
|
||||
cmp byte[SramExists],0
|
||||
je .nosramsfx
|
||||
mov esi,[sram]
|
||||
mov edi,[sfxramdata]
|
||||
mov ecx,16384
|
||||
.sfxsramloop
|
||||
mov eax,[esi]
|
||||
mov [edi],eax
|
||||
add esi,4
|
||||
add edi,4
|
||||
dec ecx
|
||||
jnz .sfxsramloop
|
||||
.nosramsfx
|
||||
call InitFxTables
|
||||
.nosfx
|
||||
|
||||
|
||||
|
||||
;Setup Seta ST010 / ST011 stuff
|
||||
cmp byte[SETAEnable],1
|
||||
jne near .noseta
|
||||
; Really banks 68h-6Fh:0000-7FFF are all mapped the same by the chip but F1ROCII only uses bank 68h
|
||||
mov dword[memtabler8+68h*4],setaaccessbankr8
|
||||
mov dword[memtablew8+68h*4],setaaccessbankw8
|
||||
mov dword[memtabler16+68h*4],setaaccessbankr16
|
||||
mov dword[memtablew16+68h*4],setaaccessbankw16
|
||||
|
||||
; Control register (and some status?) is in banks 60h-67h:0000-3FFF
|
||||
mov dword[memtabler8+60h*4],setaaccessbankr8a
|
||||
mov dword[memtablew8+60h*4],setaaccessbankw8a
|
||||
mov dword[memtabler16+60h*4],setaaccessbankr16a
|
||||
mov dword[memtablew16+60h*4],setaaccessbankw16a
|
||||
|
||||
mov dword[SetaCmdEnable],00000080h ; 60:0000
|
||||
mov esi,[setaramdata]
|
||||
mov ecx,1024 ; 4096 bytes
|
||||
.loopsetaclear
|
||||
mov dword[esi],0
|
||||
add esi,4
|
||||
dec ecx
|
||||
jnz .loopsetaclear
|
||||
cmp byte[SramExists],0
|
||||
je .nosramseta
|
||||
mov esi,[sram]
|
||||
mov edi,[setaramdata]
|
||||
mov ecx,1024
|
||||
.setasramloop
|
||||
mov eax,[esi]
|
||||
mov [edi],eax
|
||||
add esi,4
|
||||
add edi,4
|
||||
dec ecx
|
||||
jnz .setasramloop
|
||||
.nosramseta
|
||||
.noseta
|
||||
|
||||
|
||||
|
||||
;General Stuff all mixed together
|
||||
mov dword[SfxSFR],0
|
||||
mov byte[SfxSCMR],0
|
||||
call initregr
|
||||
call initregw
|
||||
cmp byte[SA1Enable],0
|
||||
je .nosa1init
|
||||
call GenerateBank0TableSA1
|
||||
call SetAddressingModesSA1
|
||||
; open .srm file
|
||||
cmp byte[CHIPBATT],1
|
||||
jne .nosa1init
|
||||
mov edx,fnames+1
|
||||
call Open_File
|
||||
jc .nosa1init
|
||||
mov byte[SramExists],1
|
||||
mov bx,ax
|
||||
mov ecx,65536*2
|
||||
mov edx,[romdata]
|
||||
add edx,1024*4096
|
||||
call Read_File
|
||||
jc .nosa1init
|
||||
call Close_File
|
||||
.nosa1init
|
||||
cmp byte[DSP1Type],1
|
||||
jne near .nodsp1lorom
|
||||
xor ecx,ecx
|
||||
.dsp1loop
|
||||
mov dword[memtabler8+30h*4+ecx],DSP1Read8b3F
|
||||
mov dword[memtablew8+30h*4+ecx],DSP1Write8b3F
|
||||
mov dword[memtabler16+30h*4+ecx],DSP1Read16b3F
|
||||
mov dword[memtablew16+30h*4+ecx],DSP1Write16b3F
|
||||
mov dword[memtabler8+0B0h*4+ecx],DSP1Read8b3F
|
||||
mov dword[memtablew8+0B0h*4+ecx],DSP1Write8b3F
|
||||
mov dword[memtabler16+0B0h*4+ecx],DSP1Read16b3F
|
||||
mov dword[memtablew16+0B0h*4+ecx],DSP1Write16b3F
|
||||
mov dword[memtabler8+0E0h*4+ecx],DSP1Read8b3F
|
||||
mov dword[memtablew8+0E0h*4+ecx],DSP1Write8b3F
|
||||
mov dword[memtabler16+0E0h*4+ecx],DSP1Read16b3F
|
||||
mov dword[memtablew16+0E0h*4+ecx],DSP1Write16b3F
|
||||
add ecx,4
|
||||
cmp ecx,16*4
|
||||
jne .dsp1loop
|
||||
cmp byte[DSP2Enable],1
|
||||
jne .nodsp1lorom
|
||||
mov dword[memtabler8+3Fh*4],DSP2Read8b
|
||||
mov dword[memtablew8+3Fh*4],DSP2Write8b
|
||||
mov dword[memtabler16+3Fh*4],DSP2Read16b
|
||||
mov dword[memtablew16+3Fh*4],DSP2Write16b
|
||||
.nodsp1lorom
|
||||
mov dword[wramdata],wramdataa
|
||||
call SPC7110Load
|
||||
ret
|
||||
|
||||
SECTION .bss
|
||||
NEWSYM C4RamR, resd 1
|
||||
NEWSYM C4RamW, resd 1
|
||||
@@ -3135,9 +2743,3 @@ NEWSYM yesoutofmemory, resb 1
|
||||
SECTION .data
|
||||
NEWSYM outofmemoryerror, db 'OUT OF MEMORY.',0
|
||||
NEWSYM outofmemoryerror2, db 'ROM IS TOO BIG.',0
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -1714,7 +1714,50 @@ void SPC7_Convert_Lower()
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int crc32_table[256];
|
||||
unsigned int crc32_table[256] = {
|
||||
0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, 0x076DC419, 0x706AF48F,
|
||||
0xE963A535, 0x9E6495A3, 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
|
||||
0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, 0x1DB71064, 0x6AB020F2,
|
||||
0xF3B97148, 0x84BE41DE, 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
|
||||
0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, 0x14015C4F, 0x63066CD9,
|
||||
0xFA0F3D63, 0x8D080DF5, 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
|
||||
0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, 0x35B5A8FA, 0x42B2986C,
|
||||
0xDBBBC9D6, 0xACBCF940, 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
|
||||
0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, 0x21B4F4B5, 0x56B3C423,
|
||||
0xCFBA9599, 0xB8BDA50F, 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
|
||||
0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, 0x76DC4190, 0x01DB7106,
|
||||
0x98D220BC, 0xEFD5102A, 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
|
||||
0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, 0x7F6A0DBB, 0x086D3D2D,
|
||||
0x91646C97, 0xE6635C01, 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
|
||||
0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, 0x65B0D9C6, 0x12B7E950,
|
||||
0x8BBEB8EA, 0xFCB9887C, 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
|
||||
0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, 0x4ADFA541, 0x3DD895D7,
|
||||
0xA4D1C46D, 0xD3D6F4FB, 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
|
||||
0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, 0x5005713C, 0x270241AA,
|
||||
0xBE0B1010, 0xC90C2086, 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
|
||||
0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, 0x59B33D17, 0x2EB40D81,
|
||||
0xB7BD5C3B, 0xC0BA6CAD, 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
|
||||
0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, 0xE3630B12, 0x94643B84,
|
||||
0x0D6D6A3E, 0x7A6A5AA8, 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
|
||||
0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, 0xF762575D, 0x806567CB,
|
||||
0x196C3671, 0x6E6B06E7, 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
|
||||
0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, 0xD6D6A3E8, 0xA1D1937E,
|
||||
0x38D8C2C4, 0x4FDFF252, 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
|
||||
0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, 0xDF60EFC3, 0xA867DF55,
|
||||
0x316E8EEF, 0x4669BE79, 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
|
||||
0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, 0xC5BA3BBE, 0xB2BD0B28,
|
||||
0x2BB45A92, 0x5CB36A04, 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
|
||||
0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, 0x9C0906A9, 0xEB0E363F,
|
||||
0x72076785, 0x05005713, 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
|
||||
0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, 0x86D3D2D4, 0xF1D4E242,
|
||||
0x68DDB3F8, 0x1FDA836E, 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
|
||||
0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, 0x8F659EFF, 0xF862AE69,
|
||||
0x616BFFD3, 0x166CCF45, 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
|
||||
0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, 0xAED16A4A, 0xD9D65ADC,
|
||||
0x40DF0B66, 0x37D83BF0, 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
|
||||
0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, 0xBAD03605, 0xCDD70693,
|
||||
0x54DE5729, 0x23D967BF, 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
|
||||
0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D };
|
||||
|
||||
unsigned int CalcCRC32 (unsigned char *start, unsigned int size)
|
||||
{
|
||||
@@ -1833,7 +1876,7 @@ bool loadSRAM(char *sramname)
|
||||
|
||||
void powercycle(bool sramload)
|
||||
{
|
||||
memset(sram, 0xFF, 8192*4);
|
||||
memset(sram, 0xFF, 32768);
|
||||
clearSPCRAM();
|
||||
|
||||
nmiprevaddrl = 0;
|
||||
@@ -1858,6 +1901,223 @@ void powercycle(bool sramload)
|
||||
|
||||
asm_call(GUIDoReset);
|
||||
}
|
||||
#ifdef _MSC_VER // Don't know why MSVC needs an extra }, but it does.
|
||||
|
||||
extern unsigned int Voice0Freq, Voice1Freq, Voice2Freq, Voice3Freq;
|
||||
extern unsigned int Voice4Freq, Voice5Freq, Voice6Freq, Voice7Freq;
|
||||
extern unsigned int dspPAdj;
|
||||
extern unsigned short Voice0Pitch, Voice1Pitch, Voice2Pitch, Voice3Pitch;
|
||||
extern unsigned short Voice4Pitch, Voice5Pitch, Voice6Pitch, Voice7Pitch;
|
||||
|
||||
void initpitch()
|
||||
{
|
||||
Voice0Pitch = DSPMem[2+0*0x10];
|
||||
Voice0Freq = ((((Voice0Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice1Pitch = DSPMem[2+1*0x10];
|
||||
Voice1Freq = ((((Voice1Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice2Pitch = DSPMem[2+2*0x10];
|
||||
Voice2Freq = ((((Voice2Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice3Pitch = DSPMem[2+3*0x10];
|
||||
Voice3Freq = ((((Voice3Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice4Pitch = DSPMem[2+4*0x10];
|
||||
Voice4Freq = ((((Voice4Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice5Pitch = DSPMem[2+5*0x10];
|
||||
Voice5Freq = ((((Voice5Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice6Pitch = DSPMem[2+6*0x10];
|
||||
Voice6Freq = ((((Voice6Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice7Pitch = DSPMem[2+7*0x10];
|
||||
Voice7Freq = ((((Voice7Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
extern unsigned int SfxR1, SfxR2, SetaCmdEnable, SfxSFR, SfxSCMR;
|
||||
extern unsigned char lorommapmode2, disablespcclr, *sfxramdata, SramExists;
|
||||
extern unsigned char *setaramdata, *wramdata, *SA1RAMArea;
|
||||
void SetAddressingModes(), GenerateBank0Table();
|
||||
void SetAddressingModesSA1(), GenerateBank0TableSA1();
|
||||
void InitDSP(), InitDSP2(), InitDSP4(), InitFxTables(), initregr(), initregw();
|
||||
void SPC7110Load();
|
||||
void rep_stosd(void (**fptrarray)(), void (*fptr), unsigned int);
|
||||
|
||||
extern void (*memtabler8[256])(), (*memtablew8[256])();
|
||||
extern void (*memtabler16[256])(), (*memtablew16[256])();
|
||||
void sramaccessbankr8(), sramaccessbankw8(), DSP4Read8b(), DSP4Write8b();
|
||||
void sramaccessbankr16(), sramaccessbankw16(), DSP4Read16b(), DSP4Write16b();
|
||||
void sfxaccessbankr8(), sfxaccessbankw8(), sfxaccessbankr16(), sfxaccessbankw16();
|
||||
void sfxaccessbankr8b(), sfxaccessbankw8b(), sfxaccessbankr16b(), sfxaccessbankw16b();
|
||||
void sfxaccessbankr8c(), sfxaccessbankw8c(), sfxaccessbankr16c(), sfxaccessbankw16c();
|
||||
void sfxaccessbankr8d(), sfxaccessbankw8d(), sfxaccessbankr16d(), sfxaccessbankw16d();
|
||||
void sramaccessbankr8s(), sramaccessbankw8s(), sramaccessbankr16s(), sramaccessbankw16s();
|
||||
void setaaccessbankr8(), setaaccessbankw8(), setaaccessbankr16(), setaaccessbankw16();
|
||||
void setaaccessbankr8a(), setaaccessbankw8a(), setaaccessbankr16a(), setaaccessbankw16a();
|
||||
void DSP1Read8b3F(), DSP1Write8b3F(), DSP1Read16b3F(), DSP1Write16b3F();
|
||||
void DSP2Read8b(), DSP2Write8b(), DSP2Read16b(), DSP2Write16b();
|
||||
|
||||
void CheckROMTypeC()
|
||||
{
|
||||
unsigned char *ROM = (unsigned char *)romdata;
|
||||
|
||||
BankCheck();
|
||||
MirrorROM();
|
||||
|
||||
lorommapmode2 = 0;
|
||||
if (!strncmp(ROM+0x207FC0, "DERBY STALLION 96", 17)) { lorommapmode2 = 1; }
|
||||
if (!strncmp(ROM+0x7FC0, "SOUND NOVEL-TCOOL", 17)) { lorommapmode2 = 1; }
|
||||
|
||||
// Setup memmapping
|
||||
SetAddressingModes();
|
||||
GenerateBank0Table();
|
||||
chip_detect();
|
||||
|
||||
disablespcclr = (memcmp(ROM+0xFFC0, "\0x42\0x53\0x20\0x5A", 4)) ? 0 : 1;
|
||||
|
||||
if ((romtype == 1) && (!SDD1Enable))
|
||||
{ // Non-SDD1 LoROM SRAM mapping, banks F0 - F3
|
||||
rep_stosd(memtabler8+0xF0, sramaccessbankr8, 4);
|
||||
rep_stosd(memtablew8+0xF0, sramaccessbankw8, 4);
|
||||
rep_stosd(memtabler16+0xF0, sramaccessbankr16, 4);
|
||||
rep_stosd(memtablew16+0xF0, sramaccessbankw16, 4);
|
||||
}
|
||||
|
||||
// Setup DSP-X stuff
|
||||
DSP1Type = 0;
|
||||
|
||||
if (DSP1Enable || DSP2Enable || DSP3Enable)
|
||||
{
|
||||
if (DSP2Enable) { asm_call(InitDSP2); }
|
||||
InitDSP();
|
||||
|
||||
DSP1Type = (romtype == 2) ? 2 : 1;
|
||||
}
|
||||
|
||||
if (DSP4Enable)
|
||||
{ // DSP-4 mapping, banks 30 - 3F
|
||||
InitDSP4();
|
||||
|
||||
rep_stosd(memtabler8+0x30, DSP4Read8b, 0x10);
|
||||
rep_stosd(memtablew8+0x30, DSP4Write8b, 0x10);
|
||||
rep_stosd(memtabler16+0x30, DSP4Read16b, 0x10);
|
||||
rep_stosd(memtablew16+0x30, DSP4Write16b, 0x10);
|
||||
}
|
||||
|
||||
if (SFXEnable)
|
||||
{ // Setup SuperFX stuff
|
||||
if (Sup48mbit)
|
||||
{
|
||||
// banks 70
|
||||
memtabler8[0x70] = sfxaccessbankr8;
|
||||
memtablew8[0x70] = sfxaccessbankw8;
|
||||
memtabler16[0x70] = sfxaccessbankr16;
|
||||
memtablew16[0x70] = sfxaccessbankw16;
|
||||
// banks 71
|
||||
memtabler8[0x71] = sfxaccessbankr8b;
|
||||
memtablew8[0x71] = sfxaccessbankw8b;
|
||||
memtabler16[0x71] = sfxaccessbankr16b;
|
||||
memtablew16[0x71] = sfxaccessbankw16b;
|
||||
// banks 72
|
||||
memtabler8[0x72] = sfxaccessbankr8c;
|
||||
memtablew8[0x72] = sfxaccessbankw8c;
|
||||
memtabler16[0x72] = sfxaccessbankr16c;
|
||||
memtablew16[0x72] = sfxaccessbankw16c;
|
||||
// banks 73
|
||||
memtabler8[0x73] = sfxaccessbankr8d;
|
||||
memtablew8[0x73] = sfxaccessbankw8d;
|
||||
memtabler16[0x73] = sfxaccessbankr16d;
|
||||
memtablew16[0x73] = sfxaccessbankw16d;
|
||||
// banks 78 - 79
|
||||
rep_stosd(memtabler8+0x78, sramaccessbankr8s, 2);
|
||||
rep_stosd(memtablew8+0x78, sramaccessbankw8s, 2);
|
||||
rep_stosd(memtabler16+0x78, sramaccessbankr16s, 2);
|
||||
rep_stosd(memtablew16+0x78, sramaccessbankw16s, 2);
|
||||
|
||||
SfxR1 = 0;
|
||||
SfxR2 = 0;
|
||||
memset(sfxramdata, 0, 262144); // clear 256kB SFX ram
|
||||
|
||||
if (SramExists)
|
||||
{
|
||||
memcpy(sfxramdata, sram, 65536); // proper SFX sram area
|
||||
}
|
||||
|
||||
asm_call(InitFxTables);
|
||||
}
|
||||
else
|
||||
{
|
||||
yesoutofmemory = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (SETAEnable)
|
||||
{ // Setup SETA 010/011 stuff
|
||||
// Really banks 68h-6Fh:0000-7FFF are all mapped the same by the chip but
|
||||
// F1 ROC II only uses bank 68h
|
||||
memtabler8[0x68] = setaaccessbankr8;
|
||||
memtablew8[0x68] = setaaccessbankw8;
|
||||
memtabler16[0x68] = setaaccessbankr16;
|
||||
memtablew16[0x68] = setaaccessbankw16;
|
||||
// Control register (and some status?) is in banks 60h-67h:0000-3FFF
|
||||
memtabler8[0x60] = setaaccessbankr8a;
|
||||
memtablew8[0x60] = setaaccessbankw8a;
|
||||
memtabler16[0x60] = setaaccessbankr16a;
|
||||
memtablew16[0x60] = setaaccessbankw16a;
|
||||
|
||||
SetaCmdEnable = 0x00000080; // 60:0000
|
||||
memset(setaramdata, 0, 4096); // clear 4kB SETA ram
|
||||
|
||||
// proper SETA sram area
|
||||
if (SramExists) { memcpy(setaramdata, sram, 4096); }
|
||||
}
|
||||
|
||||
// General stuff all mixed together [... wouldn't it be cool to clean that]
|
||||
SfxSFR = 0;
|
||||
SfxSCMR &= 0xFFFFFF00;
|
||||
asm_call(initregr);
|
||||
asm_call(initregw);
|
||||
|
||||
if (SA1Enable)
|
||||
{
|
||||
SA1RAMArea = ROM + 4096*1024;
|
||||
|
||||
GenerateBank0TableSA1();
|
||||
SetAddressingModesSA1();
|
||||
|
||||
if (CHIPBATT) // proper SA-1 sram area
|
||||
{
|
||||
memset(SA1RAMArea, 0, 131072);
|
||||
if (SramExists) { memcpy(SA1RAMArea, sram, 131072); }
|
||||
}
|
||||
}
|
||||
|
||||
if (DSP1Type == 1)
|
||||
{
|
||||
rep_stosd(memtabler8+0x30, DSP1Read8b3F, 0x10);
|
||||
rep_stosd(memtablew8+0x30, DSP1Write8b3F, 0x10);
|
||||
rep_stosd(memtabler16+0x30, DSP1Read16b3F, 0x10);
|
||||
rep_stosd(memtablew16+0x30, DSP1Write16b3F, 0x10);
|
||||
|
||||
rep_stosd(memtabler8+0xB0, DSP1Read8b3F, 0x10);
|
||||
rep_stosd(memtablew8+0xB0, DSP1Write8b3F, 0x10);
|
||||
rep_stosd(memtabler16+0xB0, DSP1Read16b3F, 0x10);
|
||||
rep_stosd(memtablew16+0xB0, DSP1Write16b3F, 0x10);
|
||||
|
||||
rep_stosd(memtabler8+0xE0, DSP1Read8b3F, 0x10);
|
||||
rep_stosd(memtablew8+0xE0, DSP1Write8b3F, 0x10);
|
||||
rep_stosd(memtabler16+0xE0, DSP1Read16b3F, 0x10);
|
||||
rep_stosd(memtablew16+0xE0, DSP1Write16b3F, 0x10);
|
||||
|
||||
if (DSP2Enable)
|
||||
{
|
||||
memtabler8[0x3F] = DSP2Read8b;
|
||||
memtablew8[0x3F] = DSP2Write8b;
|
||||
memtabler16[0x3F] = DSP2Read16b;
|
||||
memtablew16[0x3F] = DSP2Write16b;
|
||||
}
|
||||
}
|
||||
|
||||
wramdata = wramdataa;
|
||||
|
||||
asm_call(SPC7110Load);
|
||||
}
|
||||
|
||||
void SetupROMc()
|
||||
{
|
||||
CheckROMTypeC();
|
||||
}
|
||||
#endif
|
||||
@@ -152,8 +152,8 @@ CHIPSOBJ=${CHIPDIR}/dsp1emu${OE} ${CHIPDIR}/fxemu2${OE} ${CHIPDIR}/sfxproc${OE}\
|
||||
|
||||
CPUOBJ=${CPUDIR}/dma${OE} ${CPUDIR}/dsp${OE} ${CPUDIR}/dspproc${OE}\
|
||||
${CPUDIR}/execute${OE} ${CPUDIR}/irq${OE} ${CPUDIR}/memory${OE}\
|
||||
${CPUDIR}/spc700${OE} ${CPUDIR}/stable${OE} ${CPUDIR}/table${OE}\
|
||||
${CPUDIR}/tableb${OE} ${CPUDIR}/tablec${OE}
|
||||
${CPUDIR}/memtable${OE} ${CPUDIR}/spc700${OE} ${CPUDIR}/stable${OE}\
|
||||
${CPUDIR}/table${OE} ${CPUDIR}/tableb${OE} ${CPUDIR}/tablec${OE}
|
||||
|
||||
GUIOBJ=${GUIDIR}/gui${OE} ${GUIDIR}/menu${OE}
|
||||
|
||||
@@ -164,11 +164,11 @@ VIDEOBJ=${VIDEODIR}/makev16b${OE} ${VIDEODIR}/makev16t${OE} ${VIDEODIR}/makevid$
|
||||
${VIDEODIR}/newgfx16${OE} ${VIDEODIR}/newgfx2${OE} ${VIDEODIR}/newgfx${OE}\
|
||||
${VIDEODIR}/m716text${OE} ${VIDEODIR}/procvid${OE} ${VIDEODIR}/procvidc${OE}
|
||||
|
||||
#only used on Win32
|
||||
WINVIDOBJ=${VIDEODIR}/sw_draw${OE} ${VIDEODIR}/hq2x16${OE} ${VIDEODIR}/hq2x32${OE}\
|
||||
${VIDEODIR}/2xsaiw${OE} ${VIDEODIR}/hq3x16${OE} ${VIDEODIR}/hq3x32${OE}\
|
||||
${VIDEODIR}/hq4x16${OE} ${VIDEODIR}/hq4x32${OE}
|
||||
|
||||
#only used on Win32
|
||||
WINOBJ=${WINDIR}/copyvwin${OE} ${DRESOBJ}\
|
||||
${WINDIR}/winintrf${OE} ${WINDIR}/winlink${OE} ${WINDIR}/zloaderw${OE}\
|
||||
${WINDIR}/zipxw${OE} ${WINDIR}/zfilew${OE}
|
||||
@@ -267,6 +267,7 @@ ${CPUDIR}/tablec${OE}: $< ${CPUDIR}/65816dc.inc ${CPUDIR}/address.inc ${CPUDIR}/
|
||||
${CPUDIR}/stable${OE}: $< ${CPUDIR}/s65816d.inc ${CPUDIR}/saddress.inc ${CPUDIR}/saddrni.inc\
|
||||
${CPUDIR}/se65816.inc macros.mac
|
||||
${CPUDIR}/memory${OE}: $< macros.mac
|
||||
${CPUDIR}/memtable${OE}: $<
|
||||
${CPUDIR}/dma${OE}: $< macros.mac
|
||||
${CPUDIR}/irq${OE}: $< macros.mac
|
||||
${CPUDIR}/dspproc${OE}: $< macros.mac
|
||||
@@ -318,7 +319,7 @@ ${GUIDIR}/gui${OE}: $< ${GUIDIR}/guitools.inc\
|
||||
${GUIDIR}/guimisc.inc ${GUIDIR}/guimouse.inc ${GUIDIR}/guiwindp.inc\
|
||||
${GUIDIR}/guinetpl.inc ${GUIDIR}/guikeys.inc ${GUIDIR}/guicheat.inc\
|
||||
${GUIDIR}/guicombo.inc ${GUIDIR}/guiload.inc macros.mac
|
||||
${GUIDIR}/menu${OE}bj: ${GUIDIR}/menu.asm macros.mac
|
||||
${GUIDIR}/menu${OE}: $< macros.mac
|
||||
|
||||
${EFFECTSDIR}/water${OE}: $< ${EFFECTSDIR}/fixsin.h
|
||||
${EFFECTSDIR}/smoke${OE}: $<
|
||||
|
||||
@@ -284,12 +284,12 @@ static bool zmv_header_read(struct zmv_header *zmv_head, FILE *fp)
|
||||
break;
|
||||
|
||||
case BIT(7):
|
||||
zmv_head->zmv_flag.start_method = zmv_sm_power;
|
||||
break;
|
||||
zmv_head->zmv_flag.start_method = zmv_sm_power;
|
||||
break;
|
||||
|
||||
case BIT(6):
|
||||
zmv_head->zmv_flag.start_method = zmv_sm_reset;
|
||||
break;
|
||||
zmv_head->zmv_flag.start_method = zmv_sm_reset;
|
||||
break;
|
||||
|
||||
case BIT(7)|BIT(6):
|
||||
zmv_head->zmv_flag.start_method = zmv_sm_clear_all;
|
||||
@@ -890,9 +890,11 @@ static bool zmv_replay()
|
||||
REPLAY_PAD(zmv_vars.last_joy_state.D, JoyDOrig, 4);
|
||||
REPLAY_PAD(zmv_vars.last_joy_state.E, JoyEOrig, 3);
|
||||
}
|
||||
|
||||
zmv_open_vars.frames_replayed++;
|
||||
return(true);
|
||||
}
|
||||
|
||||
return(false);
|
||||
}
|
||||
|
||||
@@ -937,9 +939,11 @@ static bool zmv_next_chapter()
|
||||
|
||||
fseek(zmv_vars.fp, next_external, SEEK_SET);
|
||||
}
|
||||
|
||||
zmv_vars.rle_count = 0;
|
||||
return(true);
|
||||
}
|
||||
|
||||
return(false);
|
||||
}
|
||||
|
||||
@@ -1623,7 +1627,6 @@ static void OldMoviePlay(FILE *fp)
|
||||
MessageOn = MsgCount;
|
||||
}
|
||||
|
||||
|
||||
void MovieInsertChapter()
|
||||
{
|
||||
switch (MovieProcessing)
|
||||
|
||||
@@ -42,6 +42,10 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
#define stim()
|
||||
#endif
|
||||
|
||||
void SA1UpdateDPageC(), unpackfunct(), repackfunct();
|
||||
void PrepareOffset(), ResetOffset(), initpitch(), UpdateBanksSDD1();
|
||||
void procexecloop(), outofmemory();
|
||||
|
||||
static void copy_snes_data(unsigned char **buffer, void (*copy_func)(unsigned char **, void *, size_t))
|
||||
{
|
||||
//65816 status, etc.
|
||||
@@ -172,9 +176,13 @@ static void copy_state_data(unsigned char *buffer, void (*copy_func)(unsigned ch
|
||||
copy_func(&buffer, &tempebp, 4);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
spcnumread = 0;
|
||||
spchalted = 0xFFFFFFFF;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void memcpyinc(unsigned char **dest, void *src, size_t len)
|
||||
{
|
||||
memcpy(*dest, src, len);
|
||||
@@ -277,8 +285,8 @@ extern unsigned char RewindFrames, romispal;
|
||||
extern unsigned char MovieProcessing;
|
||||
void zmv_rewind_save(size_t, bool);
|
||||
void zmv_rewind_load(size_t, bool);
|
||||
#define ActualRewindFrames (RewindFrames * (romispal ? 25 : 30))
|
||||
|
||||
#define ActualRewindFrames (RewindFrames * (romispal ? 25 : 30))
|
||||
|
||||
void BackupCVFrame()
|
||||
{
|
||||
@@ -300,8 +308,6 @@ void RestoreCVFrame()
|
||||
RewindTimer = ActualRewindFrames;
|
||||
}
|
||||
|
||||
void outofmemory();
|
||||
|
||||
void SetupRewindBuffer()
|
||||
{
|
||||
if (StateBackup){ free(StateBackup); }
|
||||
@@ -315,6 +321,7 @@ void SetupRewindBuffer()
|
||||
}
|
||||
|
||||
static size_t state_size;
|
||||
|
||||
static void state_size_tally(unsigned char **dest, void *src, size_t len)
|
||||
{
|
||||
state_size += len;
|
||||
@@ -338,6 +345,7 @@ void InitRewindVars()
|
||||
|
||||
//This is used to preserve system load state between loads
|
||||
static unsigned char BackupSystemBuffer[0x800000]; //Half a megabyte, should be enough for a while
|
||||
|
||||
void BackupSystemVars()
|
||||
{
|
||||
unsigned char *buffer = BackupSystemBuffer;
|
||||
@@ -355,55 +363,15 @@ void RestoreSystemVars()
|
||||
copy_extra_data(&buffer, memcpyrinc);
|
||||
}
|
||||
|
||||
extern unsigned int Bank0datr8[256], Bank0datr16[256], Bank0datw8[256];
|
||||
extern unsigned int Bank0datw16[256], xd, DPageR8, DPageR16, DPageW8;
|
||||
extern unsigned int DPageW16;
|
||||
|
||||
void UpdateDPageC()
|
||||
{
|
||||
DPageR8 = Bank0datr8[(xd >> 8) & 0xFF];
|
||||
DPageR16 = Bank0datr16[(xd >> 8) & 0xFF];
|
||||
DPageW8 = Bank0datw8[(xd >> 8) & 0xFF];
|
||||
DPageW16 = Bank0datw16[(xd >> 8) & 0xFF];
|
||||
}
|
||||
|
||||
extern unsigned int SA1xd, SA1DPageR8, SA1DPageR16, SA1DPageW8, SA1DPageW16;
|
||||
|
||||
void SA1UpdateDPageC()
|
||||
{
|
||||
SA1DPageR8 = Bank0datr8[(SA1xd >> 8) & 0xFF];
|
||||
SA1DPageR16 = Bank0datr16[(SA1xd >> 8) & 0xFF];
|
||||
SA1DPageW8 = Bank0datw8[(SA1xd >> 8) & 0xFF];
|
||||
SA1DPageW16 = Bank0datw16[(SA1xd >> 8) & 0xFF];
|
||||
}
|
||||
|
||||
extern unsigned int xdb, xpb, xs, xx, xy;
|
||||
extern unsigned short oamaddrt, xat, xst, xdt, xxt, xyt;
|
||||
extern unsigned char xdbt, xpbt;
|
||||
|
||||
void unpackfunct()
|
||||
{
|
||||
oamaddrt = (oamaddr & 0xFFFF);
|
||||
xat = (xa & 0xFFFF);
|
||||
xdbt = (xdb & 0xFF);
|
||||
xpbt = (xpb & 0xFF);
|
||||
xst = (xs & 0xFFFF);
|
||||
xdt = (xd & 0xFFFF);
|
||||
xxt = (xx & 0xFFFF);
|
||||
xyt = (xy & 0xFFFF);
|
||||
}
|
||||
|
||||
extern unsigned int spcBuffera;
|
||||
extern unsigned int Voice0BufPtr, Voice1BufPtr, Voice2BufPtr, Voice3BufPtr;
|
||||
extern unsigned int Voice4BufPtr, Voice5BufPtr, Voice6BufPtr, Voice7BufPtr;
|
||||
extern unsigned int Curtableaddr, tableA[256], spcPCRam, spcRamDP;
|
||||
extern unsigned int spcPCRam, spcRamDP;
|
||||
|
||||
void PrepareSaveState()
|
||||
{
|
||||
unsigned int offst = (unsigned int)spcRam;
|
||||
|
||||
spcPCRam -= offst;
|
||||
spcRamDP -= offst;
|
||||
spcPCRam -= (unsigned int)spcRam;
|
||||
spcRamDP -= (unsigned int)spcRam;
|
||||
|
||||
Voice0BufPtr -= spcBuffera;
|
||||
Voice1BufPtr -= spcBuffera;
|
||||
@@ -415,151 +383,14 @@ void PrepareSaveState()
|
||||
Voice7BufPtr -= spcBuffera;
|
||||
}
|
||||
|
||||
#define byteset(byte, checkbit) (byte & (1 << checkbit)) ? 1 : 0
|
||||
|
||||
extern unsigned int GlobalVL, GlobalVR, EchoVL, EchoVR, EchoRate[16], MaxEcho;
|
||||
extern unsigned int EchoFB, NoiseSpeeds[32], dspPAdj, NoiseInc, bg1ptrx;
|
||||
extern unsigned int bg1ptry, bg2ptrx, bg2ptry, bg3ptrx, bg3ptry, bg4ptrx;
|
||||
extern unsigned int bg4ptry;
|
||||
extern signed int FIRTAPVal0, FIRTAPVal1, FIRTAPVal2, FIRTAPVal3, FIRTAPVal4;
|
||||
extern signed int FIRTAPVal5, FIRTAPVal6, FIRTAPVal7;
|
||||
extern unsigned short VolumeConvTable[32768], bg1ptr, bg1ptrb, bg1ptrc;
|
||||
extern unsigned short bg2ptr, bg2ptrb, bg2ptrc, bg3ptr, bg3ptrb, bg3ptrc;
|
||||
extern unsigned short bg4ptr, bg4ptrb, bg4ptrc;
|
||||
extern unsigned char VolumeTableb[256], MusicVol, Voice0Status;
|
||||
extern unsigned char Voice1Status, Voice2Status, Voice3Status, Voice4Status;
|
||||
extern unsigned char Voice5Status, Voice6Status, Voice7Status, Voice0Noise;
|
||||
extern unsigned char Voice1Noise, Voice2Noise, Voice3Noise, Voice4Noise;
|
||||
extern unsigned char Voice5Noise, Voice6Noise, Voice7Noise, bgtilesz;
|
||||
extern unsigned char BG116x16t, BG216x16t, BG316x16t, BG416x16t, vramincby8on;
|
||||
extern unsigned char vramincr;
|
||||
|
||||
extern void (**regptw)();
|
||||
void reg2118();
|
||||
void reg2118inc();
|
||||
void reg2118inc8();
|
||||
void reg2118inc8inc();
|
||||
void reg2119();
|
||||
void reg2119inc();
|
||||
void reg2119inc8();
|
||||
void reg2119inc8inc();
|
||||
|
||||
void repackfunct()
|
||||
{
|
||||
signed char val;
|
||||
unsigned char block;
|
||||
|
||||
// Global/Echo Volumes
|
||||
GlobalVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x0C]]] & 0xFF);
|
||||
GlobalVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x1C]]] & 0xFF);
|
||||
EchoVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x2C]]] & 0xFF);
|
||||
EchoVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x3C]]] & 0xFF);
|
||||
|
||||
// Echo Values
|
||||
MaxEcho = EchoRate[(DSPMem[0x7D] & 0xF)];
|
||||
EchoFB = VolumeTableb[DSPMem[0x0D]];
|
||||
|
||||
// FIR Filter Values
|
||||
val = DSPMem[0x0F];
|
||||
FIRTAPVal0 = (signed int)val;
|
||||
val = DSPMem[0x1F];
|
||||
FIRTAPVal1 = (signed int)val;
|
||||
val = DSPMem[0x2F];
|
||||
FIRTAPVal2 = (signed int)val;
|
||||
val = DSPMem[0x3F];
|
||||
FIRTAPVal3 = (signed int)val;
|
||||
val = DSPMem[0x4F];
|
||||
FIRTAPVal4 = (signed int)val;
|
||||
val = DSPMem[0x5F];
|
||||
FIRTAPVal5 = (signed int)val;
|
||||
val = DSPMem[0x6F];
|
||||
FIRTAPVal6 = (signed int)val;
|
||||
val = DSPMem[0x7F];
|
||||
FIRTAPVal7 = (signed int)val;
|
||||
|
||||
// Noise
|
||||
block = DSPMem[0x6C];
|
||||
DSPMem[0x6C] &= 0x7F;
|
||||
|
||||
if (block && 0xC0)
|
||||
{
|
||||
Voice0Status = Voice1Status = Voice2Status = Voice3Status = 0;
|
||||
Voice4Status = Voice5Status = Voice6Status = Voice7Status = 0;
|
||||
}
|
||||
|
||||
NoiseInc = (((NoiseSpeeds[(block & 0x1F)] * dspPAdj) >> 17) & 0xFFFFFFFF);
|
||||
|
||||
Voice0Noise = byteset (DSPMem[0x3D], 0);
|
||||
Voice1Noise = byteset (DSPMem[0x3D], 1);
|
||||
Voice2Noise = byteset (DSPMem[0x3D], 2);
|
||||
Voice3Noise = byteset (DSPMem[0x3D], 3);
|
||||
Voice4Noise = byteset (DSPMem[0x3D], 4);
|
||||
Voice5Noise = byteset (DSPMem[0x3D], 5);
|
||||
Voice6Noise = byteset (DSPMem[0x3D], 6);
|
||||
Voice7Noise = byteset (DSPMem[0x3D], 7);
|
||||
|
||||
bg1ptrx = bg1ptrb - bg1ptr;
|
||||
bg1ptry = bg1ptrc - bg1ptr;
|
||||
bg2ptrx = bg2ptrb - bg2ptr;
|
||||
bg2ptry = bg2ptrc - bg2ptr;
|
||||
bg3ptrx = bg3ptrb - bg3ptr;
|
||||
bg3ptry = bg3ptrc - bg3ptr;
|
||||
bg4ptrx = bg4ptrb - bg4ptr;
|
||||
bg4ptry = bg4ptrc - bg4ptr;
|
||||
|
||||
// 16x16 tiles
|
||||
BG116x16t = byteset (bgtilesz, 0);
|
||||
BG216x16t = byteset (bgtilesz, 1);
|
||||
BG316x16t = byteset (bgtilesz, 2);
|
||||
BG416x16t = byteset (bgtilesz, 3);
|
||||
|
||||
oamaddr = oamaddrt;
|
||||
xa = xat;
|
||||
xdb = xdbt;
|
||||
xpb = xpbt;
|
||||
xs = xst;
|
||||
xd = xdt;
|
||||
xx = xxt;
|
||||
xy = xyt;
|
||||
|
||||
if (vramincby8on == 1)
|
||||
{
|
||||
if (vramincr == 1)
|
||||
{
|
||||
regptw[0x2118] = reg2118inc8inc;
|
||||
regptw[0x2119] = reg2119inc8;
|
||||
}
|
||||
else
|
||||
{
|
||||
regptw[0x2118] = reg2118inc8;
|
||||
regptw[0x2119] = reg2119inc8inc;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (vramincr == 1)
|
||||
{
|
||||
regptw[0x2118] = reg2118inc;
|
||||
regptw[0x2119] = reg2119;
|
||||
}
|
||||
else
|
||||
{
|
||||
regptw[0x2118] = reg2118;
|
||||
regptw[0x2119] = reg2119inc;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int SA1Stat;
|
||||
extern unsigned char IRAM[2049], *SA1Ptr, *SA1RegPCS, *CurBWPtr, *SA1BWPtr;
|
||||
extern unsigned char *SNSBWPtr;
|
||||
|
||||
void SaveSA1()
|
||||
{
|
||||
unsigned int offst=(unsigned int)SA1RegPCS;
|
||||
|
||||
SA1Stat &= 0xFFFFFF00;
|
||||
SA1Ptr -= offst;
|
||||
SA1Ptr -= (unsigned int)SA1RegPCS;
|
||||
|
||||
if (SA1RegPCS == IRAM)
|
||||
{
|
||||
@@ -571,21 +402,18 @@ void SaveSA1()
|
||||
SA1Stat = (SA1Stat & 0xFFFFFF00) + 2;
|
||||
}
|
||||
|
||||
offst = (unsigned int)romdata;
|
||||
SA1RegPCS -= offst;
|
||||
CurBWPtr -= offst;
|
||||
SA1BWPtr -= offst;
|
||||
SNSBWPtr -= offst;
|
||||
SA1RegPCS -= (unsigned int)romdata;
|
||||
CurBWPtr -= (unsigned int)romdata;
|
||||
SA1BWPtr -= (unsigned int)romdata;
|
||||
SNSBWPtr -= (unsigned int)romdata;
|
||||
}
|
||||
|
||||
void RestoreSA1()
|
||||
{
|
||||
unsigned int offst=(unsigned int)romdata;
|
||||
|
||||
SA1RegPCS += offst;
|
||||
CurBWPtr += offst;
|
||||
SA1BWPtr += offst;
|
||||
SNSBWPtr += offst;
|
||||
SA1RegPCS += (unsigned int)romdata;
|
||||
CurBWPtr += (unsigned int)romdata;
|
||||
SA1BWPtr += (unsigned int)romdata;
|
||||
SNSBWPtr += (unsigned int)romdata;
|
||||
|
||||
if ((SA1Stat & 0xFF) == 1)
|
||||
{
|
||||
@@ -597,8 +425,7 @@ void RestoreSA1()
|
||||
SA1RegPCS = IRAM-0x3000;
|
||||
}
|
||||
|
||||
offst = (unsigned int)SA1RegPCS;
|
||||
SA1Ptr += offst;
|
||||
SA1Ptr += (unsigned int)SA1RegPCS;
|
||||
SA1RAMArea = romdata + 4096*1024;
|
||||
}
|
||||
|
||||
@@ -611,10 +438,8 @@ void RestoreSA1()
|
||||
|
||||
void ResetState()
|
||||
{
|
||||
unsigned int offst = (unsigned int)spcRam;
|
||||
|
||||
spcPCRam += offst;
|
||||
spcRamDP += offst;
|
||||
spcPCRam += (unsigned int)spcRam;
|
||||
spcRamDP += (unsigned int)spcRam;
|
||||
|
||||
ResState(Voice0BufPtr);
|
||||
ResState(Voice1BufPtr);
|
||||
@@ -659,16 +484,6 @@ void calculate_state_sizes()
|
||||
old_zst_size = state_size + sizeof(zst_header_old)-1;
|
||||
}
|
||||
|
||||
void PrepareOffset()
|
||||
{
|
||||
Curtableaddr -= (unsigned int)tableA;
|
||||
}
|
||||
|
||||
void ResetOffset()
|
||||
{
|
||||
Curtableaddr += (unsigned int)tableA;
|
||||
}
|
||||
|
||||
void zst_save(FILE *fp, bool Thumbnail)
|
||||
{
|
||||
fwrite(zst_header_cur, 1, sizeof(zst_header_cur)-1, fp); //-1 for null
|
||||
@@ -784,119 +599,12 @@ void statesaver()
|
||||
stim();
|
||||
}
|
||||
|
||||
extern unsigned int snesmmap[256], snesmap2[256];
|
||||
/*extern unsigned int NumofBanks;
|
||||
extern unsigned char SA1BankVal[4];
|
||||
|
||||
void BankSwitchC (unsigned char bank, unsigned int offset1, unsigned int offset2, unsigned int pointer)
|
||||
{
|
||||
unsigned int curbankval=SA1BankVal[bank], membankval, i;
|
||||
|
||||
if ((NumofBanks & 0xFF) == 64) { curbankval &= 1 ; }
|
||||
|
||||
curbankval &= 7;
|
||||
curbankval <<= 20;
|
||||
|
||||
if (SA1BankVal[bank] & 0x80)
|
||||
{
|
||||
membankval = (pointer + (unsigned int)romdata - 0x8000);
|
||||
}
|
||||
else
|
||||
{
|
||||
membankval = (curbankval + (unsigned int)romdata - 0x8000);
|
||||
}
|
||||
|
||||
for (i=0 ; i<32 ; i++)
|
||||
{
|
||||
snesmmap[offset1+i] = membankval;
|
||||
membankval += 0x8000;
|
||||
}
|
||||
|
||||
membankval = curbankval + (unsigned int)romdata;
|
||||
|
||||
for (i=0 ; i<16 ; i++)
|
||||
{
|
||||
snesmap2[offset2+i] = membankval;
|
||||
snesmmap[offset2+i] = membankval;
|
||||
membankval += 0x10000;
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int SA1BankSw;
|
||||
|
||||
void UpdateBanks()
|
||||
{
|
||||
if ((SA1BankSw & 0xFF) == 1)
|
||||
{
|
||||
BankSwitchC (0, 0x000, 0x0C0, 0x000000) ;
|
||||
BankSwitchC (1, 0x020, 0x0D0, 0x100000) ;
|
||||
BankSwitchC (2, 0x080, 0x0E0, 0x200000) ;
|
||||
BankSwitchC (3, 0x0A0, 0x0F0, 0x300000) ;
|
||||
}
|
||||
}*/
|
||||
|
||||
void BankSwitchSDD1C (unsigned char bankval, unsigned int offset)
|
||||
{
|
||||
unsigned int curbankval = bankval, i;
|
||||
|
||||
curbankval &= 7;
|
||||
curbankval <<= 20;
|
||||
curbankval += (unsigned int)romdata;
|
||||
|
||||
for (i=0; i<16 ; i++)
|
||||
{
|
||||
snesmap2[offset+i] = curbankval;
|
||||
snesmmap[offset+i] = curbankval;
|
||||
curbankval += 0x10000;
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned char SDD1BankA, SDD1BankB, SDD1BankC, SDD1BankD;
|
||||
|
||||
void UpdateBanksSDD1()
|
||||
{
|
||||
if (SDD1BankA)
|
||||
{
|
||||
BankSwitchSDD1C(SDD1BankA, 0x0C0);
|
||||
BankSwitchSDD1C(SDD1BankB, 0x0D0);
|
||||
BankSwitchSDD1C(SDD1BankC, 0x0E0);
|
||||
BankSwitchSDD1C(SDD1BankD, 0x0F0);
|
||||
}
|
||||
}
|
||||
|
||||
extern unsigned int Voice0Freq, Voice1Freq, Voice2Freq, Voice3Freq;
|
||||
extern unsigned int Voice4Freq, Voice5Freq, Voice6Freq, Voice7Freq;
|
||||
extern unsigned short Voice0Pitch, Voice1Pitch, Voice2Pitch, Voice3Pitch;
|
||||
extern unsigned short Voice4Pitch, Voice5Pitch, Voice6Pitch, Voice7Pitch;
|
||||
|
||||
void initpitch()
|
||||
{
|
||||
Voice0Pitch = DSPMem[2+0*0x10];
|
||||
Voice0Freq = ((((Voice0Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice1Pitch = DSPMem[2+1*0x10];
|
||||
Voice1Freq = ((((Voice1Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice2Pitch = DSPMem[2+2*0x10];
|
||||
Voice2Freq = ((((Voice2Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice3Pitch = DSPMem[2+3*0x10];
|
||||
Voice3Freq = ((((Voice3Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice4Pitch = DSPMem[2+4*0x10];
|
||||
Voice4Freq = ((((Voice4Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice5Pitch = DSPMem[2+5*0x10];
|
||||
Voice5Freq = ((((Voice5Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice6Pitch = DSPMem[2+6*0x10];
|
||||
Voice6Freq = ((((Voice6Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
Voice7Pitch = DSPMem[2+7*0x10];
|
||||
Voice7Freq = ((((Voice7Pitch & 0x3FFF) * dspPAdj) >> 8) & 0xFFFFFFFF);
|
||||
}
|
||||
|
||||
extern unsigned int KeyLoadState, Totalbyteloaded, SfxMemTable[256], SfxCPB;
|
||||
extern unsigned int SfxPBR, SfxROMBR, SfxRAMBR;
|
||||
extern unsigned char pressed[256+128+64], multchange, txtloadmsg[15];
|
||||
extern unsigned char txtconvmsg[16], txtnfndmsg[23], ioportval, SDD1Enable;
|
||||
extern unsigned char nexthdma;
|
||||
|
||||
void procexecloop();
|
||||
|
||||
static void read_save_state_data(unsigned char **dest, void *data, size_t len)
|
||||
{
|
||||
load_save_size += fread(data, 1, len, fhandle);
|
||||
@@ -912,7 +620,6 @@ bool zst_load(FILE *fp)
|
||||
{
|
||||
zst_version = 143; //v1.43+
|
||||
}
|
||||
// the -2 means we only check the text - trust me, that's ok
|
||||
if (!memcmp(zst_header_check, zst_header_old, sizeof(zst_header_check)-2))
|
||||
{
|
||||
zst_version = 60; //v0.60 - v1.42
|
||||
@@ -937,11 +644,6 @@ bool zst_load(FILE *fp)
|
||||
if (SA1Enable)
|
||||
{
|
||||
RestoreSA1(); //Convert back SA-1 stuff
|
||||
/*
|
||||
All UpdateBanks() seems to do is break Oshaberi Parodius...
|
||||
The C port is still present, just commented out
|
||||
*/
|
||||
//UpdateBanks();
|
||||
SA1UpdateDPageC();
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user