Cleaned up some code, improved BS detection, ported asm to C.

zsnes/src/init.asm

@@ -111,7 +111,9 @@ EXTSYM sramaccessbankw8,sramaccessbankw8s,GenerateBank0TableSA1
 EXTSYM ScrDispl,wramreadptr,wramwriteptr
 EXTSYM pl1Ltk,pl1Rtk,pl2Ltk,pl2Rtk,pl3Ltk,pl3Rtk,pl4Ltk,pl4Rtk,pl5Ltk,pl5Rtk
 EXTSYM loadstate2, headerhack
+
 ;initc.c
+EXTSYM chip_detect
 EXTSYM clearmem,clearSPCRAM
 EXTSYM PatchUsingIPS
 EXTSYM loadZipFile
@@ -127,6 +129,8 @@ EXTSYM SPC7PackIndexLoad,SPC7110IndexSize
 EXTSYM DumpROMLoadInfo
 EXTSYM SetupSramSize
 EXTSYM IntlEHi
+EXTSYM CHIPBATT,SFXEnable,C4Enable,SPC7110Enable,RTCEnable,SA1Enable,SDD1Enable,OBCEnable
+EXTSYM SETAEnable,ST18Enable,SGBEnable,DSP1Enable,DSP2Enable,DSP3Enable,DSP4Enable,BSEnable
 
 EXTSYM SetaCmdEnable,setaramdata
 EXTSYM setaaccessbankr8,setaaccessbankw8,setaaccessbankr8a,setaaccessbankw8a
@@ -3278,184 +3282,9 @@ NEWSYM CheckROMType
     call SetAddressingModes
     call GenerateBank0Table
 
-    ; Chip Detection
+    pushad
-    mov byte[SFXEnable],0
+    call chip_detect
-    mov byte[C4Enable],0
+    popad
-    mov byte[SPC7110Enable],0
-    mov byte[RTCEnable],0
-    mov byte[SA1Enable],0
-    mov byte[SDD1Enable],0
-    mov byte[OBCEnable],0
-    mov byte[CHIPBATT],0
-    mov byte[SGBEnable],0
-    mov byte[SETAEnable],0
-    mov byte[ST18Enable],0
-    mov byte[DSP1Enable],0
-    mov byte[DSP2Enable],0
-    mov byte[DSP3Enable],0
-    mov byte[DSP4Enable],0
-    mov byte[BSEnable],0
-
-    mov esi,[romdata]
-    add esi,[infoloc]
-    add esi,21
-
-    mov ax,[esi]
-    cmp ax,02530h
-    jne .notOBC1
-    mov byte[OBCEnable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notOBC1      
-    cmp ax,04532h
-    jne .notSDD1A
-    mov byte[SDD1Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notSDD1A
-    cmp ax,04332h
-    jne .notSDD1B
-    mov byte[SDD1Enable],1
-    jmp .endchpdtct
-.notSDD1B
-    cmp ax,0E320h
-    jne .notSGB
-    mov byte[SGBEnable],1
-    jmp .endchpdtct
-.notSGB
-    cmp ax,0F320h
-    jne .notC4
-    mov byte[C4Enable],1
-    jmp .endchpdtct
-.notC4
-    cmp ax,03523h
-    jne .notSA1A
-    mov byte[SA1Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notSA1A
-    cmp ax,03423h
-    jne .notSA1B
-    mov byte[SA1Enable],1
-    jmp .endchpdtct
-.notSA1B
-    cmp ax,0F530h
-    jne .notSETAA
-    mov byte[ST18Enable],1
-    mov byte[CHIPBATT],1 ;Check later if this should be removed
-    jmp .endchpdtct
-.notSETAA
-    cmp ax,0F630h
-    jne .notSETAB
-    mov byte[SETAEnable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notSETAB
-;Super FX has SRAM, but only a battery to save it on the latter two
-    cmp ax,01320h
-    jne .notSFXA
-    mov byte[SFXEnable],1
-    jmp .endchpdtct
-.notSFXA
-    cmp ax,01420h
-    jne .notSFXB
-    mov byte[SFXEnable],1
-    jmp .endchpdtct
-.notSFXB
-    cmp ax,01520h
-    jne .notSFXC
-    mov byte[SFXEnable],1
-    mov byte[CHIPBATT],1 ;Contains Battery
-    jmp .endchpdtct
-.notSFXC
-    cmp ax,01A20h
-    jne .notSFXD
-    mov byte[SFXEnable],1
-    mov byte[CHIPBATT],1 ;Contains Battery
-    jmp .endchpdtct
-.notSFXD
-    cmp ax,05535h
-    jne .notRTCplain
-    mov byte[RTCEnable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notRTCplain
-    cmp ax,0F93Ah
-    jne .notSPC7A
-    mov byte[SPC7110Enable],1
-    mov byte[RTCEnable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notSPC7A
-    cmp ax,0F53Ah
-    jne .notSPC7B
-    mov byte[SPC7110Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notSPC7B
-    cmp ax,00520h
-    jne .notDSP2  
-    mov byte[DSP2Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notDSP2 
-    cmp ax,00330h
-    jne .notDSP4  
-    mov byte[DSP4Enable],1
-    jmp .endchpdtct
-.notDSP4
-    cmp ax,00530h
-    jne .notDSP3  
-    cmp byte[esi+5],0B2h ;Bandai only
-    jne .notDSP3  
-    mov byte[DSP3Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notDSP3
-    cmp ah,3
-    jne .notDSP1A  
-    mov byte[DSP1Enable],1
-    jmp .endchpdtct
-.notDSP1A
-    cmp ah,5
-    jne .notDSP1B
-    mov byte[DSP1Enable],1
-    mov byte[CHIPBATT],1
-    jmp .endchpdtct
-.notDSP1B
-    cmp byte[esi+5],033h
-    je .bsgoodDA
-    cmp byte[esi+5],0FFh
-    je .bsgoodDA
-    jmp .notBS
-.bsgoodDA
-    cmp al,0
-    je .bsgoodD5
-    mov bl,al
-    and bl,083h
-    cmp bl,080h
-    je .bsgoodD5
-    jmp .notBS
-.bsgoodD5
-    cmp ah,0FFh
-    jne .checkgooddate
-    cmp byte[esi+1],0FFh
-    je .validdate
-    jmp .notBS
-.checkgooddate
-    mov bh,ah
-    and bh,0Fh
-    jnz .notBS
-    mov bh,ah
-    shr bh,4
-    dec bh
-    cmp bh,12
-    jae .notBS
-.validdate
-    mov byte[BSEnable],1
-    jmp .endchpdtct
-.notBS
-.endchpdtct
     
     ;Setup some Memmapping
     mov byte[DSP1Type],0
@@ -3699,22 +3528,6 @@ NEWSYM CheckROMType
     ret
 
 SECTION .bss
-NEWSYM CHIPBATT, resb 1
-NEWSYM SFXEnable, resb 1
-NEWSYM C4Enable, resb 1
-NEWSYM SPC7110Enable, resb 1
-NEWSYM RTCEnable, resb 1
-NEWSYM SA1Enable, resb 1
-NEWSYM SDD1Enable, resb 1
-NEWSYM OBCEnable, resb 1
-NEWSYM SETAEnable, resb 1 ;ST010 & 11
-NEWSYM ST18Enable, resb 1
-NEWSYM SGBEnable, resb 1
-NEWSYM DSP1Enable, resb 1
-NEWSYM DSP2Enable, resb 1
-NEWSYM DSP3Enable, resb 1
-NEWSYM DSP4Enable, resb 1
-NEWSYM BSEnable, resb 1
 NEWSYM C4RamR,   resd 1
 NEWSYM C4RamW,   resd 1
 NEWSYM C4Ram,   resd 1

zsnes/src/initc.c

@@ -45,7 +45,7 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 #define true 1
 #define false 0
 
-
+//NSRT Goodness
 #define Lo 0x7FC0
 #define Hi 0xFFC0
 #define EHi 0x40FFC0
@@ -53,6 +53,25 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 #define MB_bytes 0x100000
 #define Mbit_bytes 0x20000
 
+//Offsets to add to infoloc start to reach particular variable
+#define BankOffset       21 //Contains Speed as well
+#define TypeOffset       22
+#define ROMSizeOffset    23
+#define SRAMSizeOffset   24
+#define CountryOffset    25
+#define CompanyOffset    26
+#define VersionOffset    27
+#define InvCSLowOffset   28
+#define InvCSHiOffset    29
+#define CSLowOffset      30
+#define CSHiOffset       31
+//Additional defines for the BS header
+#define BSYearOffset     21 //Not sure how to calculate year yet
+#define BSMonthOffset    22
+#define BSDayOffset      23
+#define BSBankOffset     24
+#define BSSizeOffset     25 //Contains Type as well
+//26 - 31 is the same
 
 
 void Debug_WriteString(char *str)
@@ -89,8 +108,8 @@ unsigned int addOnSize;
 //Deinterleave functions
 bool validChecksum(unsigned char *ROM, int BankLoc)
 {
-  if (ROM[BankLoc + 28] + (ROM[BankLoc + 29] << 8) +
+  if (ROM[BankLoc + InvCSLowOffset] + (ROM[BankLoc + InvCSHiOffset] << 8) +
-      ROM[BankLoc + 30] + (ROM[BankLoc + 31] << 8) == 0xFFFF)
+      ROM[BankLoc + CSLowOffset] + (ROM[BankLoc + CSHiOffset] << 8) == 0xFFFF)
   {
     return(true);
   }
@@ -99,7 +118,7 @@ bool validChecksum(unsigned char *ROM, int BankLoc)
 
 bool EHiHeader(unsigned char *ROM, int BankLoc)
 {
-  if (validChecksum(ROM, BankLoc) && ROM[BankLoc+21] == 53)
+  if (validChecksum(ROM, BankLoc) && ROM[BankLoc+BankOffset] == 53)
   {
     return(true);
   }
@@ -154,20 +173,20 @@ void CheckIntl1(unsigned char *ROM)
   unsigned int ROMmidPoint = NumofBytes / 2;
   if (validChecksum(ROM, ROMmidPoint + Lo) &&
      !validChecksum(ROM, Lo) &&
-      ROM[ROMmidPoint+Lo+25] < 14) //Country Code
+      ROM[ROMmidPoint+Lo+CountryOffset] < 14) //Country Code
   {
     deintlv1();
     Interleaved = true;
   }
   else if (validChecksum(ROM, Lo) && !validChecksum(ROM, Hi) &&
-           ROM[Lo+25] < 14 && //Country code
+           ROM[Lo+CountryOffset] < 14 && //Country code
            //Rom make up
-          (ROM[Lo+21] == 33 || ROM[Lo+21] == 49 ||
+          (ROM[Lo+BankOffset] == 33 || ROM[Lo+BankOffset] == 49 ||
-           ROM[Lo+21] == 53 || ROM[Lo+21] == 58))
+           ROM[Lo+BankOffset] == 53 || ROM[Lo+BankOffset] == 58))
   {
     if (ROM[Lo+20] == 32 ||//Check that Header name did not overflow
-      !(ROM[Lo+21] == ROM[Lo+20] || ROM[Lo+21] == ROM[Lo+19] ||
+      !(ROM[Lo+BankOffset] == ROM[Lo+20] || ROM[Lo+BankOffset] == ROM[Lo+19] ||
-        ROM[Lo+21] == ROM[Lo+18] || ROM[Lo+21] == ROM[Lo+17]))
+        ROM[Lo+BankOffset] == ROM[Lo+18] || ROM[Lo+BankOffset] == ROM[Lo+17]))
     {
       deintlv1();
       Interleaved = true;
@@ -243,10 +262,10 @@ int InfoScore(unsigned char *Buffer)
 {
   int score = 0;
   if (validChecksum(Buffer, 0))      { score += 4; }
-  if (Buffer[26] == 0x33)            { score += 2; }
+  if (Buffer[CompanyOffset] == 0x33)            { score += 2; }
   if (!(Buffer[61] & 0x80))          { score -= 4; }
-  if ((1 << (Buffer[23] - 7)) > 48)  { score -= 1; }
+  if ((1 << (Buffer[ROMSizeOffset] - 7)) > 48)  { score -= 1; }
-  if (Buffer[25] < 14)               { score += 1; }
+  if (Buffer[CountryOffset] < 14)               { score += 1; }
   if (!AllASCII(Buffer, 20))         { score -= 1; }
   return(score);
 }
@@ -283,7 +302,7 @@ void BankCheck()
     loscore = InfoScore(ROM+Lo);
     hiscore = InfoScore(ROM+Hi);
 
-    switch(ROM[Lo + 21])
+    switch(ROM[Lo + BankOffset])
     {
       case 32: case 35: case 48: case 50:
         loscore += 2;
@@ -291,7 +310,7 @@ void BankCheck()
         loscore += 1;
         break;
     }
-    switch(ROM[Hi + 21])
+    switch(ROM[Hi + BankOffset])
     {
       case 33: case 49: case 53: case 58:
         hiscore += 2;
@@ -333,6 +352,193 @@ void BankCheck()
   }
 }
 
+//Chip detection functions
+bool CHIPBATT;
+bool BSEnable;
+bool C4Enable;
+bool DSP1Enable;
+bool DSP2Enable;
+bool DSP3Enable;
+bool DSP4Enable;
+bool OBCEnable;
+bool RTCEnable;
+bool SA1Enable;
+bool SDD1Enable;
+bool SETAEnable; //ST010 & 11
+bool SFXEnable;
+bool SGBEnable;
+bool SPC7110Enable;
+bool ST18Enable;
+
+bool valid_normal_bank(unsigned char bankbyte)
+{
+  switch (bankbyte)
+  {
+    case 32: case 33: case 48: case 49:
+    return(true);
+    break;
+  }
+  return(false);
+}
+
+void chip_detect()
+{
+  unsigned char *ROM = (unsigned char *)romdata;
+
+  C4Enable = false;
+  RTCEnable = false;
+  SA1Enable = false;
+  SDD1Enable = false;
+  OBCEnable = false;
+  CHIPBATT = false;
+  SGBEnable = false;
+  ST18Enable = false;
+  DSP1Enable = false;
+  DSP2Enable = false;
+  DSP3Enable = false;
+  DSP4Enable = false;
+  SPC7110Enable = false;
+  BSEnable = false;
+  SFXEnable = false;
+  SETAEnable = false;
+  
+  //DSP Family
+  if (ROM[infoloc+TypeOffset] == 3)
+  {
+    if (ROM[infoloc+BankOffset] == 48)
+    { 
+      DSP4Enable = true;
+    }
+    else
+    {
+      DSP1Enable = true;
+    }
+    return;
+  }  
+  if (ROM[infoloc+TypeOffset] == 5)
+  {
+    CHIPBATT = true;
+    if (ROM[infoloc+BankOffset] == 32)
+    { 
+      DSP2Enable = true;
+    }
+    else if (ROM[infoloc+BankOffset] == 48 && ROM[infoloc+CompanyOffset] == 0xB2) //Bandai
+    { 
+      DSP3Enable = true;
+    }
+    else
+    {
+      DSP1Enable = true;
+    }
+    return;
+  }
+
+  switch((unsigned short)ROM[infoloc+BankOffset] | (ROM[infoloc+TypeOffset] << 8))
+  {
+    case 0x1320:                             //Mario Chip 1
+    case 0x1420:                             //GSU-x
+      SFXEnable = true;
+      return;
+      break;
+      
+      
+    case 0x1520:                            //GSU-x + Battery
+    case 0x1A20:                            //GSU-1 + Battery + Start in 21MHz
+      SFXEnable = true;
+      CHIPBATT = true;    
+      return;
+      break;
+    
+    case 0x2530:
+      OBCEnable = true;
+      CHIPBATT = true;
+      return;
+      break;
+    
+    case 0x3423:
+      SA1Enable = true;
+      return;
+      break;
+    
+    case 0x3523:
+      SA1Enable = true;
+      CHIPBATT = true;
+      return;
+      break;
+
+    case 0x4332:
+      SDD1Enable = true;
+      return;
+      break;
+
+    case 0x4532:
+      SDD1Enable = true;
+      CHIPBATT = true;     
+      return;
+      break;
+      
+    case 0x5535:
+      RTCEnable = true;
+      CHIPBATT = true;
+      return;
+      break;
+      
+    case 0xE320:
+      SGBEnable = true;
+      return;
+      break;
+    
+    case 0xF320: 
+      C4Enable = true;
+      return;
+      break;
+    
+    case 0xF530: 
+      ST18Enable = true;
+      CHIPBATT = true; //Check later if this should be removed      
+      return;
+      break;
+    
+    case 0xF53A:
+      SPC7110Enable = true;
+      CHIPBATT = true;
+      return;
+      break;
+    
+    case 0xF630:
+      SETAEnable = true;
+      CHIPBATT = true;
+      return;
+      break;
+
+    case 0xF93A:
+      SPC7110Enable = true;
+      RTCEnable = true;      
+      CHIPBATT = true;
+      return;
+      break;
+  }
+
+  //BS Dump
+  if ((ROM[infoloc+CompanyOffset] == 0x33 || ROM[infoloc+CompanyOffset] == 0xFF) &&
+      (!ROM[infoloc+BSYearOffset] || (ROM[infoloc+BSYearOffset] & 131) == 128) &&
+      valid_normal_bank(ROM[infoloc+BSBankOffset]))
+  {
+    unsigned char m = ROM[infoloc+BSMonthOffset];
+    if (!m && !ROM[infoloc+BSDayOffset])
+    {
+      //BS Add-on cart
+      return;
+    }
+    if ((m == 0xFF && ROM[infoloc+BSDayOffset] == 0xFF) ||
+        (!(m & 0xF) && ((m >> 4) - 1 < 12)))
+    {
+      BSEnable = true;
+      return;
+    }
+  }
+
+}
 
 //Checksum functions
 unsigned short sum(unsigned char *array, unsigned int size)
@@ -353,8 +559,6 @@ unsigned short sum(unsigned char *array, unsigned int size)
   return(theSum);
 }
 
-extern bool SPC7110Enable;
-extern bool BSEnable;
 extern unsigned short Checksumvalue;
 void CalcChecksum()
 {
@@ -417,10 +621,6 @@ void MirrorROM()
   NumofBanks = curromspace >> 15;
 }
 
-#define SRAMSizeOffset   24 
-#define CompanyOffset    26
-extern bool SFXEnable;
-extern bool SETAEnable;
 void SetupSramSize()
 {
   unsigned char *ROM = (unsigned char *)romdata;
@@ -787,8 +987,8 @@ void SplitSupport()
   SplittedROM = false;
   
   //Same Game add on
-  if (ROM[Hi+26] == 0x33 && curromspace == 0x80000 &&
+  if (ROM[Hi+CompanyOffset] == 0x33 && curromspace == 0x80000 &&
-      !ROM[Hi+21] && !ROM[Hi+22] && !ROM[Hi+23])
+      !ROM[Hi+BankOffset] && !ROM[Hi+BSMonthOffset] && !ROM[Hi+BSDayOffset])
   {
     addOnStart = 0x200000;
     addOnSize = 0x80000;
@@ -796,8 +996,8 @@ void SplitSupport()
   }          
 
   //SD Gundam G-Next add on  
-  if (ROM[Lo+26] == 0x33 && curromspace == 0x80000 &&
+  if (ROM[Lo+CompanyOffset] == 0x33 && curromspace == 0x80000 &&
-      !ROM[Lo+21] && !ROM[Lo+22] && !ROM[Lo+23] && !strncmp(ROM+Lo, "GNEXT", 5))
+      !ROM[Lo+BankOffset] && !ROM[Lo+BSMonthOffset] && !ROM[Lo+BSDayOffset] && !strncmp(ROM+Lo, "GNEXT", 5))
   {
     addOnStart = 0x400000;
     addOnSize = 0x80000;