Memmapping port step 1 - easier to read, still a lot to do. Power on w/ clear SRAM now works with SA-1 games. Reverted chips/sa1proc.asm to rev 1.42 because all recent work only breaks HnK3 (the SMRPG fix is due to pagefault's subscreen/windowing logic fixes).
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@@ -33,12 +33,13 @@ extern unsigned int spcnumread, spchalted, opcd, HIRQCycNext, oamaddr;
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extern unsigned int SfxR0, *setaramdata, ramsize, *sram;
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extern unsigned int tempesi, tempedi, tempedx, tempebp;
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extern unsigned int SPCMultA, PHnum2writespc7110reg, PHdspsave2;
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extern unsigned char sndrot, spcRam[65472];
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extern unsigned char DSPMem[256], SA1Status, *SA1RAMArea, DSP1Type, DSP1COp;
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extern unsigned char prevoamptr, BRRBuffer[32], *romdata, curcyc, echoon0;
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extern unsigned char sndrot, spcRam[65472], DSPMem[256], SA1Status, *SA1RAMArea;
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extern unsigned char DSP1Type, DSP1COp, prevoamptr, BRRBuffer[32], *romdata;
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extern unsigned char curcyc, echoon0;
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extern unsigned char vidmemch4[4096], vidmemch8[4096], vidmemch2[4096];
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extern bool C4Enable, SFXEnable, SA1Enable, SPC7110Enable, SETAEnable, spcon, SRAMState;
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extern bool C4Enable, SFXEnable, SA1Enable, SPC7110Enable, SETAEnable, spcon;
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extern bool SRAMState;
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extern short C4WFXVal, C41FXVal, Op00Multiplicand, Op04Angle, Op08X, Op18X;
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extern short Op28X, Op0CA, Op02FX, Op0AVS, Op06X, Op01m, Op0DX, Op03F, Op14Zr;
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