Memmapping port step 1 - easier to read, still a lot to do. Power on w/ clear SRAM now works with SA-1 games. Reverted chips/sa1proc.asm to rev 1.42 because all recent work only breaks HnK3 (the SMRPG fix is due to pagefault's subscreen/windowing logic fixes).
This commit is contained in:
grinvader
@@ -3229,50 +3229,6 @@ NEWSYM SA1UpdateDPage
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pop eax
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ret
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NEWSYM GenerateBank0Table
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mov eax,Bank0datr8
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writetobank0table membank0r8ram,20h
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writetobank0table membank0r8reg,28h
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writetobank0table membank0r8inv,17h
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writetobank0table membank0r8chip,1Fh
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writetobank0table membank0r8rom,81h
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writetobank0table membank0r8romram,1h
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mov eax,Bank0datw8
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writetobank0table membank0w8ram,20h
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writetobank0table membank0w8reg,28h
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writetobank0table membank0w8inv,17h
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writetobank0table membank0w8chip,1Fh
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writetobank0table membank0w8rom,81h
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writetobank0table membank0w8romram,1h
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mov eax,Bank0datr16
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writetobank0table membank0r16ram,1Fh
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writetobank0table membank0r16ramh,1
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writetobank0table membank0r16reg,28h
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writetobank0table membank0r16inv,17h
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writetobank0table membank0r16chip,1Fh
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writetobank0table membank0r16rom,81h
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writetobank0table membank0r16romram,1h
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mov eax,Bank0datw16
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writetobank0table membank0w16ram,1Fh
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writetobank0table membank0w16ramh,1
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writetobank0table membank0w16reg,28h
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writetobank0table membank0w16inv,17h
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writetobank0table membank0w16chip,1Fh
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writetobank0table membank0w16rom,81h
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writetobank0table membank0w16romram,1h
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ret
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NEWSYM GenerateBank0TableSA1
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mov eax,Bank0datr8
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writetobank0table membank0r8ramSA1,20h
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mov eax,Bank0datw8
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writetobank0table membank0w8ramSA1,20h
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mov eax,Bank0datr16
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writetobank0table membank0r16ramSA1,20h
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mov eax,Bank0datw16
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writetobank0table membank0w16ramSA1,20h
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ret
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; SA1 Stuff
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NEWSYM membank0r8ramSA1 ; 0000-1FFF
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cmp byte[SA1Status],0
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432
zsnes/src/cpu/memtable.c
Normal file
432
zsnes/src/cpu/memtable.c
Normal file
@@ -0,0 +1,432 @@
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/*
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Copyright (C) 1997-2005 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
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http://www.zsnes.com
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http://sourceforge.net/projects/zsnes
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later
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version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifdef __LINUX__
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#include "gblhdr.h"
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#define DIR_SLASH "/"
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#else
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/stat.h>
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#define DIR_SLASH "\\"
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#endif
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#include "gblvars.h"
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extern unsigned int Curtableaddr, tableA[256];
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void PrepareOffset()
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{
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Curtableaddr -= (unsigned int)tableA;
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}
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void ResetOffset()
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{
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Curtableaddr += (unsigned int)tableA;
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}
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extern unsigned int snesmmap[256], snesmap2[256];
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void BankSwitchSDD1C (unsigned char bankval, unsigned int offset)
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{
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unsigned int curbankval = bankval, i;
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curbankval &= 7;
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curbankval <<= 20;
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curbankval += (unsigned int)romdata;
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for (i=0; i<16 ; i++)
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{
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snesmap2[offset+i] = curbankval;
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snesmmap[offset+i] = curbankval;
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curbankval += 0x10000;
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}
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}
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extern unsigned char SDD1BankA, SDD1BankB, SDD1BankC, SDD1BankD;
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void UpdateBanksSDD1()
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{
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if (SDD1BankA)
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{
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BankSwitchSDD1C(SDD1BankA, 0x0C0);
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BankSwitchSDD1C(SDD1BankB, 0x0D0);
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BankSwitchSDD1C(SDD1BankC, 0x0E0);
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BankSwitchSDD1C(SDD1BankD, 0x0F0);
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}
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}
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extern void (*Bank0datr8[256])(), (*Bank0datr16[256])(), (*Bank0datw8[256])();
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extern void (*Bank0datw16[256])(), *DPageR8, *DPageR16, *DPageW8, *DPageW16;
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extern unsigned int xdb, xpb, xs, xx, xy, xd;
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extern unsigned short oamaddrt, xat, xst, xdt, xxt, xyt;
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extern unsigned char xdbt, xpbt;
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void UpdateDPageC()
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{
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DPageR8 = Bank0datr8[(xd >> 8) & 0xFF];
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DPageR16 = Bank0datr16[(xd >> 8) & 0xFF];
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DPageW8 = Bank0datw8[(xd >> 8) & 0xFF];
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DPageW16 = Bank0datw16[(xd >> 8) & 0xFF];
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}
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extern unsigned int SA1xd;
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extern void *SA1DPageR8, *SA1DPageR16, *SA1DPageW8, *SA1DPageW16;
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void SA1UpdateDPageC()
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{
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SA1DPageR8 = Bank0datr8[(SA1xd >> 8) & 0xFF];
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SA1DPageR16 = Bank0datr16[(SA1xd >> 8) & 0xFF];
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SA1DPageW8 = Bank0datw8[(SA1xd >> 8) & 0xFF];
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SA1DPageW16 = Bank0datw16[(SA1xd >> 8) & 0xFF];
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}
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void unpackfunct()
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{
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oamaddrt = (oamaddr & 0xFFFF);
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xat = (xa & 0xFFFF);
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xdbt = (xdb & 0xFF);
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xpbt = (xpb & 0xFF);
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xst = (xs & 0xFFFF);
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xdt = (xd & 0xFFFF);
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xxt = (xx & 0xFFFF);
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xyt = (xy & 0xFFFF);
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}
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#define bit_test(byte, checkbit) (byte & (1 << checkbit)) ? 1 : 0
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extern unsigned int GlobalVL, GlobalVR, EchoVL, EchoVR, EchoRate[16], MaxEcho;
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extern unsigned int EchoFB, NoiseSpeeds[32], dspPAdj, NoiseInc, bg1ptrx;
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extern unsigned int bg1ptry, bg2ptrx, bg2ptry, bg3ptrx, bg3ptry, bg4ptrx;
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extern unsigned int bg4ptry;
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extern signed int FIRTAPVal0, FIRTAPVal1, FIRTAPVal2, FIRTAPVal3, FIRTAPVal4;
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extern signed int FIRTAPVal5, FIRTAPVal6, FIRTAPVal7;
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extern unsigned short VolumeConvTable[32768], bg1ptr, bg1ptrb, bg1ptrc;
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extern unsigned short bg2ptr, bg2ptrb, bg2ptrc, bg3ptr, bg3ptrb, bg3ptrc;
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extern unsigned short bg4ptr, bg4ptrb, bg4ptrc;
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extern unsigned char VolumeTableb[256], MusicVol, Voice0Status;
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extern unsigned char Voice1Status, Voice2Status, Voice3Status, Voice4Status;
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extern unsigned char Voice5Status, Voice6Status, Voice7Status, Voice0Noise;
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extern unsigned char Voice1Noise, Voice2Noise, Voice3Noise, Voice4Noise;
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extern unsigned char Voice5Noise, Voice6Noise, Voice7Noise, bgtilesz;
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extern unsigned char BG116x16t, BG216x16t, BG316x16t, BG416x16t, vramincby8on;
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extern unsigned char vramincr;
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extern void (**regptw)();
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void reg2118();
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void reg2118inc();
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void reg2118inc8();
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void reg2118inc8inc();
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void reg2119();
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void reg2119inc();
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void reg2119inc8();
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void reg2119inc8inc();
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void repackfunct()
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{
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signed char val;
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unsigned char block;
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// Global/Echo Volumes
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GlobalVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x0C]]] & 0xFF);
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GlobalVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x1C]]] & 0xFF);
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EchoVL = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x2C]]] & 0xFF);
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EchoVR = (VolumeConvTable[(MusicVol << 8) + VolumeTableb[DSPMem[0x3C]]] & 0xFF);
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// Echo Values
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MaxEcho = EchoRate[(DSPMem[0x7D] & 0xF)];
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EchoFB = VolumeTableb[DSPMem[0x0D]];
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// FIR Filter Values
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val = DSPMem[0x0F];
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FIRTAPVal0 = (signed int)val;
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val = DSPMem[0x1F];
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FIRTAPVal1 = (signed int)val;
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val = DSPMem[0x2F];
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FIRTAPVal2 = (signed int)val;
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val = DSPMem[0x3F];
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FIRTAPVal3 = (signed int)val;
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val = DSPMem[0x4F];
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FIRTAPVal4 = (signed int)val;
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val = DSPMem[0x5F];
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FIRTAPVal5 = (signed int)val;
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val = DSPMem[0x6F];
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FIRTAPVal6 = (signed int)val;
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val = DSPMem[0x7F];
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FIRTAPVal7 = (signed int)val;
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// Noise
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block = DSPMem[0x6C];
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DSPMem[0x6C] &= 0x7F;
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if (block && 0xC0)
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{
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Voice0Status = Voice1Status = Voice2Status = Voice3Status = 0;
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Voice4Status = Voice5Status = Voice6Status = Voice7Status = 0;
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}
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NoiseInc = (((NoiseSpeeds[(block & 0x1F)] * dspPAdj) >> 17) & 0xFFFFFFFF);
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Voice0Noise = bit_test(DSPMem[0x3D], 0);
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Voice1Noise = bit_test(DSPMem[0x3D], 1);
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Voice2Noise = bit_test(DSPMem[0x3D], 2);
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Voice3Noise = bit_test(DSPMem[0x3D], 3);
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Voice4Noise = bit_test(DSPMem[0x3D], 4);
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Voice5Noise = bit_test(DSPMem[0x3D], 5);
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Voice6Noise = bit_test(DSPMem[0x3D], 6);
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Voice7Noise = bit_test(DSPMem[0x3D], 7);
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bg1ptrx = bg1ptrb - bg1ptr;
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bg1ptry = bg1ptrc - bg1ptr;
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bg2ptrx = bg2ptrb - bg2ptr;
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bg2ptry = bg2ptrc - bg2ptr;
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bg3ptrx = bg3ptrb - bg3ptr;
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bg3ptry = bg3ptrc - bg3ptr;
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bg4ptrx = bg4ptrb - bg4ptr;
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bg4ptry = bg4ptrc - bg4ptr;
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// 16x16 tiles
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BG116x16t = bit_test(bgtilesz, 0);
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BG216x16t = bit_test(bgtilesz, 1);
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BG316x16t = bit_test(bgtilesz, 2);
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BG416x16t = bit_test(bgtilesz, 3);
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oamaddr = oamaddrt;
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xa = xat;
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xdb = xdbt;
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xpb = xpbt;
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xs = xst;
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xd = xdt;
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xx = xxt;
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xy = xyt;
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if (vramincby8on == 1)
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{
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if (vramincr == 1)
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{
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regptw[0x2118] = reg2118inc8inc;
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regptw[0x2119] = reg2119inc8;
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}
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else
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{
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regptw[0x2118] = reg2118inc8;
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regptw[0x2119] = reg2119inc8inc;
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}
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}
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else
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{
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if (vramincr == 1)
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{
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regptw[0x2118] = reg2118inc;
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regptw[0x2119] = reg2119;
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}
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else
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{
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regptw[0x2118] = reg2118;
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regptw[0x2119] = reg2119inc;
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}
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}
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}
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extern void (*memtabler8[256])();
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extern void (*memtablew8[256])();
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extern void (*memtabler16[256])();
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extern void (*memtablew16[256])();
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void regaccessbankr8(), regaccessbankr8SA1();
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void memaccessbankr8();
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void sramaccessbankr8(), SA1RAMaccessbankr8(), SA1RAMaccessbankr8b();
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void wramaccessbankr8(), eramaccessbankr8();
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void regaccessbankw8(), regaccessbankw8SA1();
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void memaccessbankw8();
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void sramaccessbankw8(), SA1RAMaccessbankw8(), SA1RAMaccessbankw8b();
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void wramaccessbankw8(), eramaccessbankw8();
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void regaccessbankr16(), regaccessbankr16SA1();
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void memaccessbankr16();
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void sramaccessbankr16(), SA1RAMaccessbankr16(), SA1RAMaccessbankr16b();
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void wramaccessbankr16(), eramaccessbankr16();
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void regaccessbankw16(), regaccessbankw16SA1();
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void memaccessbankw16();
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void sramaccessbankw16(), SA1RAMaccessbankw16(), SA1RAMaccessbankw16b();
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void wramaccessbankw16(), eramaccessbankw16();
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|
||||
/*
|
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rep_stosd is my name for a 'copy <num> times a function pointer <func_ptr> into
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a function pointer array <dest>' function, in honour of the almighty asm
|
||||
instruction rep stosd, which is able to do that (and much more).
|
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Since ZSNES is just full of func pointer arrays, it'll probably come in handy.
|
||||
*/
|
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|
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void rep_stosd(void (**dest)(), void (*func_ptr), unsigned int num)
|
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{
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while (num--) { dest[num] = func_ptr; }
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}
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|
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void SetAddressingModes()
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{
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// set 8-bit read memory tables banks
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rep_stosd(memtabler8+0x00, regaccessbankr8, 0x40); // 00 - 3F
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rep_stosd(memtabler8+0x40, memaccessbankr8, 0x30); // 40 - 6F
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rep_stosd(memtabler8+0x70, sramaccessbankr8, 0x08); // 70 - 77
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rep_stosd(memtabler8+0x78, memaccessbankr8, 0x06); // 78 - 7D
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memtabler8[0x7E] = wramaccessbankr8; // 7E
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memtabler8[0x7F] = eramaccessbankr8; // 7F
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||||
rep_stosd(memtabler8+0x80, regaccessbankr8, 0x40); // 80 - BF
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rep_stosd(memtabler8+0xC0, memaccessbankr8, 0x40); // C0 - FF
|
||||
|
||||
// set 8-bit write memory tables banks
|
||||
rep_stosd(memtablew8+0x00, regaccessbankw8, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew8+0x40, memaccessbankw8, 0x30); // 40 - 6F
|
||||
rep_stosd(memtablew8+0x70, sramaccessbankw8, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew8+0x78, memaccessbankw8, 0x06); // 78 - 7D
|
||||
memtablew8[0x7E] = wramaccessbankw8; // 7E
|
||||
memtablew8[0x7F] = eramaccessbankw8; // 7F
|
||||
rep_stosd(memtablew8+0x80, regaccessbankw8, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew8+0xC0, memaccessbankw8, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit read memory tables banks
|
||||
rep_stosd(memtabler16+0x00, regaccessbankr16, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler16+0x40, memaccessbankr16, 0x30); // 40 - 6F
|
||||
rep_stosd(memtabler16+0x70, sramaccessbankr16, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler16+0x78, memaccessbankr16, 0x06); // 78 - 7D
|
||||
memtabler16[0x7E] = wramaccessbankr16; // 7E
|
||||
memtabler16[0x7F] = eramaccessbankr16; // 7F
|
||||
rep_stosd(memtabler16+0x80, regaccessbankr16, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler16+0xC0, memaccessbankr16, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit write memory tables banks
|
||||
rep_stosd(memtablew16+0x00, regaccessbankw16, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew16+0x40, memaccessbankw16, 0x30); // 40 - 6F
|
||||
rep_stosd(memtablew16+0x70, sramaccessbankw16, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew16+0x78, memaccessbankw16, 0x06); // 78 - 7D
|
||||
memtablew16[0x7E] = wramaccessbankw16; // 7E
|
||||
memtablew16[0x7F] = eramaccessbankw16; // 7F
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||||
rep_stosd(memtablew16+0x80, regaccessbankw16, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew16+0xC0, memaccessbankw16, 0x40); // C0 - FF
|
||||
}
|
||||
|
||||
void SetAddressingModesSA1()
|
||||
{
|
||||
// set 8-bit read memory tables banks
|
||||
rep_stosd(memtabler8+0x00, regaccessbankr8SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler8+0x40, SA1RAMaccessbankr8, 0x20); // 40 - 5F
|
||||
rep_stosd(memtabler8+0x60, SA1RAMaccessbankr8b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtabler8+0x70, sramaccessbankr8, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler8+0x78, memaccessbankr8, 0x06); // 78 - 7D
|
||||
memtabler8[0x7E] = wramaccessbankr8; // 7E
|
||||
memtabler8[0x7F] = eramaccessbankr8; // 7F
|
||||
rep_stosd(memtabler8+0x80, regaccessbankr8SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler8+0xC0, memaccessbankr8, 0x40); // C0 - FF
|
||||
|
||||
// set 8-bit write memory tables banks
|
||||
rep_stosd(memtablew8+0x00, regaccessbankw8SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew8+0x40, SA1RAMaccessbankw8, 0x20); // 40 - 5F
|
||||
rep_stosd(memtablew8+0x60, SA1RAMaccessbankw8b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtablew8+0x70, sramaccessbankw8, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew8+0x78, memaccessbankw8, 0x06); // 78 - 7D
|
||||
memtablew8[0x7E] = wramaccessbankw8; // 7E
|
||||
memtablew8[0x7F] = eramaccessbankw8; // 7F
|
||||
rep_stosd(memtablew8+0x80, regaccessbankw8SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew8+0xC0, memaccessbankw8, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit read memory tables banks
|
||||
rep_stosd(memtabler16+0x00, regaccessbankr16SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtabler16+0x40, SA1RAMaccessbankr16, 0x20); // 40 - 5F
|
||||
rep_stosd(memtabler16+0x60, SA1RAMaccessbankr16b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtabler16+0x70, sramaccessbankr16, 0x08); // 70 - 77
|
||||
rep_stosd(memtabler16+0x78, memaccessbankr16, 0x06); // 78 - 7D
|
||||
memtabler16[0x7E] = wramaccessbankr16; // 7E
|
||||
memtabler16[0x7F] = eramaccessbankr16; // 7F
|
||||
rep_stosd(memtabler16+0x80, regaccessbankr16SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtabler16+0xC0, memaccessbankr16, 0x40); // C0 - FF
|
||||
|
||||
// set 16-bit write memory tables banks
|
||||
rep_stosd(memtablew16+0x00, regaccessbankw16SA1, 0x40); // 00 - 3F
|
||||
rep_stosd(memtablew16+0x40, SA1RAMaccessbankw16, 0x20); // 40 - 5F
|
||||
rep_stosd(memtablew16+0x60, SA1RAMaccessbankw16b, 0x10); // 60 - 6F
|
||||
rep_stosd(memtablew16+0x70, sramaccessbankw16, 0x08); // 70 - 77
|
||||
rep_stosd(memtablew16+0x78, memaccessbankw16, 0x06); // 78 - 7D
|
||||
memtablew16[0x7E] = wramaccessbankw16; // 7E
|
||||
memtablew16[0x7F] = eramaccessbankw16; // 7F
|
||||
rep_stosd(memtablew16+0x80, regaccessbankw16SA1, 0x40); // 80 - BF
|
||||
rep_stosd(memtablew16+0xC0, memaccessbankw16, 0x40); // C0 - FF
|
||||
}
|
||||
|
||||
void membank0r8ram(), membank0r8ramSA1();
|
||||
void membank0r8reg(), membank0r8inv(), membank0r8chip();
|
||||
void membank0r8rom(), membank0r8romram();
|
||||
|
||||
void membank0w8ram(), membank0w8ramSA1();
|
||||
void membank0w8reg(), membank0w8inv(), membank0w8chip();
|
||||
void membank0w8rom(), membank0w8romram();
|
||||
|
||||
void membank0r16ram(), membank0r16ramSA1();
|
||||
void membank0r16reg(), membank0r16inv(), membank0r16chip();
|
||||
void membank0r16rom(), membank0r16romram();
|
||||
|
||||
void membank0w16ram(), membank0w16ramSA1();
|
||||
void membank0w16reg(), membank0w16inv(), membank0w16chip();
|
||||
void membank0w16rom(), membank0w16romram();
|
||||
|
||||
void GenerateBank0Table()
|
||||
{
|
||||
rep_stosd(Bank0datr8+0x00, membank0r8ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr8+0x20, membank0r8reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datr8+0x48, membank0r8inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datr8+0x5F, membank0r8chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datr8+0x7E, membank0r8rom, 0x81); // 7E - FE
|
||||
Bank0datr8[0xFF] = membank0r8romram; // FF
|
||||
|
||||
rep_stosd(Bank0datw8+0x00, membank0w8ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw8+0x20, membank0w8reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datw8+0x48, membank0w8inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datw8+0x5F, membank0w8chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datw8+0x7E, membank0w8rom, 0x81); // 7E - FE
|
||||
Bank0datw8[0xFF] = membank0w8romram; // FF
|
||||
|
||||
rep_stosd(Bank0datr16+0x00, membank0r16ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr16+0x20, membank0r16reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datr16+0x48, membank0r16inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datr16+0x5F, membank0r16chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datr16+0x7E, membank0r16rom, 0x81); // 7E - FE
|
||||
Bank0datr16[0xFF] = membank0r16romram; // FF
|
||||
|
||||
rep_stosd(Bank0datw16+0x00, membank0w16ram, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw16+0x20, membank0w16reg, 0x28); // 20 - 47
|
||||
rep_stosd(Bank0datw16+0x48, membank0w16inv, 0x17); // 48 - 5E
|
||||
rep_stosd(Bank0datw16+0x5F, membank0w16chip, 0x1F); // 5F - 7D
|
||||
rep_stosd(Bank0datw16+0x7E, membank0w16rom, 0x81); // 7E - FE
|
||||
Bank0datw16[0xFF] = membank0w16romram; // FF
|
||||
}
|
||||
|
||||
void GenerateBank0TableSA1()
|
||||
{
|
||||
rep_stosd(Bank0datr8, membank0r8ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw8, membank0w8ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datr16, membank0r16ramSA1, 0x20); // 00 - 1F
|
||||
rep_stosd(Bank0datw16, membank0w16ramSA1, 0x20); // 00 - 1F
|
||||
}
|
||||
@@ -20,9 +20,6 @@
|
||||
|
||||
%include "macros.mac"
|
||||
|
||||
EXTSYM eramaccessbankr16,eramaccessbankr8,eramaccessbankw16
|
||||
EXTSYM eramaccessbankw8,memaccessbankr16,memaccessbankr8
|
||||
EXTSYM memaccessbankw16,memaccessbankw8
|
||||
EXTSYM mosjmptab,mosdraw10,mosdraw11,mosdraw12,mosdraw13
|
||||
EXTSYM mosdraw14,mosdraw15,mosdraw16,mosdraw2,mosdraw3
|
||||
EXTSYM mosdraw4,mosdraw5,mosdraw6,mosdraw7,mosdraw8
|
||||
@@ -43,16 +40,7 @@ EXTSYM mosjmptab16bntms,mosdraw1016bntms,mosdraw1116bntms,mosdraw1216bntms,mosdr
|
||||
EXTSYM mosdraw1416bntms,mosdraw1516bntms,mosdraw1616bntms,mosdraw216bntms,mosdraw316bntms
|
||||
EXTSYM mosdraw416bntms,mosdraw516bntms,mosdraw616bntms,mosdraw716bntms,mosdraw816bntms
|
||||
EXTSYM mosdraw916bntms
|
||||
EXTSYM regaccessbankr16,regaccessbankw16,regaccessbankw8
|
||||
EXTSYM sramaccessbankr16,sramaccessbankr8,sramaccessbankw16
|
||||
EXTSYM sramaccessbankw8,tableA,tableB,tableC,tableD,tableE
|
||||
EXTSYM tableF,tableG,tableH,wramaccessbankr16
|
||||
EXTSYM wramaccessbankr8,wramaccessbankw16,wramaccessbankw8
|
||||
EXTSYM regaccessbankr8SA1,regaccessbankr16SA1,regaccessbankw8SA1
|
||||
EXTSYM regaccessbankw16SA1,SA1RAMaccessbankr8,SA1RAMaccessbankr16
|
||||
EXTSYM SA1RAMaccessbankw8,SA1RAMaccessbankw16
|
||||
EXTSYM SA1RAMaccessbankr8b,SA1RAMaccessbankr16b
|
||||
EXTSYM SA1RAMaccessbankw8b,SA1RAMaccessbankw16b
|
||||
EXTSYM tableA,tableB,tableC,tableD,tableE,tableF,tableG,tableH
|
||||
EXTSYM DPageR8,DPageW8,DPageR16,DPageW16
|
||||
EXTSYM SDD1Enable
|
||||
EXTSYM JoyAOrig,JoyANow,JoyBOrig,JoyBNow,JoyCOrig,JoyCNow,JoyDOrig,JoyDNow
|
||||
@@ -77,12 +65,12 @@ section .data
|
||||
;tableF times 256 dd 0 ; Table addresses (M:1,X:0,D:1)
|
||||
;tableG times 256 dd 0 ; Table addresses (M:0,X:1,D:1)
|
||||
;tableH times 256 dd 0 ; Table addresses (M:1,X:1,D:1)
|
||||
NEWSYM addrmdef, times 27 dd 0 ; Address modes
|
||||
NEWSYM addrmdef, times 27 dd 0 ; Address modes
|
||||
;tablead times 256 dd 0 ; Table address location according to P
|
||||
;memtabler8 times 256 dd 0 ; Memory Bank Locations for reading 8-bit
|
||||
;memtablew8 times 256 dd 0 ; Memory Bank Locations for writing 8-bit
|
||||
;memtabler16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtablew16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtabler16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
;memtablew16 times 256 dd 0 ; Memory Bank Locations for reading 16-bit
|
||||
|
||||
section .text
|
||||
|
||||
@@ -332,286 +320,6 @@ NEWSYM inittable
|
||||
pop es
|
||||
ret
|
||||
|
||||
NEWSYM SetAddressingModes
|
||||
; set 8-bit read memory tables
|
||||
mov edi,memtabler8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 8-bit write memory tables
|
||||
mov edi,memtablew8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit read memory tables
|
||||
mov edi,memtabler16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit write memory tables
|
||||
mov edi,memtablew16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$30
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
ret
|
||||
|
||||
NEWSYM SetAddressingModesSA1
|
||||
; set 8-bit read memory tables
|
||||
mov edi,memtabler8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankr8
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankr8b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 8-bit write memory tables
|
||||
mov edi,memtablew8
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankw8
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankw8b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw8
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw8
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw8
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw8SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw8
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit read memory tables
|
||||
mov edi,memtabler16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankr16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankr16
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankr16b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankr16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankr16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankr16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankr16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankr16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
|
||||
; set 16-bit write memory tables
|
||||
mov edi,memtablew16
|
||||
; banks 0-3Fh
|
||||
mov eax,regaccessbankw16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks 40-6Fh
|
||||
mov eax,SA1RAMaccessbankw16
|
||||
mov ecx,$20
|
||||
rep stosd
|
||||
mov eax,SA1RAMaccessbankw16b
|
||||
mov ecx,$10
|
||||
rep stosd
|
||||
; bank 70-77h
|
||||
mov eax,sramaccessbankw16
|
||||
mov ecx,8
|
||||
rep stosd
|
||||
; bank 78-7D
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,6
|
||||
rep stosd
|
||||
; bank 7E
|
||||
mov eax,wramaccessbankw16
|
||||
stosd
|
||||
; bank 7F
|
||||
mov eax,eramaccessbankw16
|
||||
stosd
|
||||
; banks 80-BF
|
||||
mov eax,regaccessbankw16SA1
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
; banks C0-FFh
|
||||
mov eax,memaccessbankw16
|
||||
mov ecx,$40
|
||||
rep stosd
|
||||
ret
|
||||
|
||||
eopINVALID
|
||||
ret
|
||||
|
||||
@@ -637,22 +345,22 @@ NEWSYM cpucycle
|
||||
db 2, 5, 5, 7, 6, 4, 6, 6, 2, 4, 3, 3, 6, 4, 7, 5
|
||||
db 2, 6, 3, 4, 3, 3, 5, 6, 2, 2, 2, 3, 4, 4, 6, 5
|
||||
db 2, 5, 5, 7, 5, 4, 6, 6, 2, 4, 4, 2, 6, 4, 7, 5
|
||||
; | 2 8 | 2 6 | 2 8 | 2 4 | 2 5 | 2 3 | 2 5 | 2 6 | 1 3 | 2 2 | 1 2 | 1 4 | 3 6 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 5 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 3 6 | 2 6 | 4 8 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 4 | 2 2 | 1 2 | 1 5 | 3 4 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 4 | 3 4 | 3 7 | 4 5 |
|
||||
; | 1 7 | 2 6 | 2 2 | 2 4 | 3 7 | 2 3 | 2 5 | 2 6 | 1 3 | 2 2 | 1 2 | 1 3 | 3 3 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 3 7 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 3 | 1 2 | 4 4 | 3 4 | 3 7 | 4 5 |
|
||||
; | 1 6 | 2 6 | 3 6 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 4 | 2 2 | 1 2 | 1 6 | 3 5 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 4 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 2 2 | 2 6 | 3 3 | 2 4 | 2 3 | 2 3 | 2 3 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 5 | 2 7 | 2 4 | 2 4 | 2 4 | 2 6 | 1 2 | 3 5 | 1 2 | 1 2 | 3 4 | 3 5 | 3 5 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 2 | 2 4 | 2 3 | 2 3 | 2 3 | 2 6 | 1 2 | 2 2 | 1 2 | 1 4 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 4 | 2 4 | 2 4 | 2 6 | 1 2 | 3 4 | 1 2 | 1 2 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 3 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 4 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 2 6 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 3 | 1 3 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; | 2 2 | 2 6 | 2 3 | 2 4 | 2 3 | 2 3 | 2 5 | 2 6 | 1 2 | 2 2 | 1 2 | 1 3 | 3 4 | 3 4 | 3 6 | 4 5 |
|
||||
; | 2 2 | 2 5 | 2 5 | 2 7 | 3 5 | 2 4 | 2 6 | 2 6 | 1 2 | 3 4 | 1 4 | 1 2 | 3 6 | 3 4 | 3 7 | 4 5 |
|
||||
; 28 | 26 | 28 | 24 | 25 | 23 | 25 | 26 | 13 | 22 | 12 | 14 | 36 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 25 | 24 | 26 | 26 | 12 | 34 | 12 | 12 | 36 | 34 | 37 | 45
|
||||
; 36 | 26 | 48 | 24 | 23 | 23 | 25 | 26 | 14 | 22 | 12 | 15 | 34 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 26 | 26 | 12 | 34 | 12 | 12 | 34 | 34 | 37 | 45
|
||||
; 17 | 26 | 22 | 24 | 37 | 23 | 25 | 26 | 13 | 22 | 12 | 13 | 33 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 37 | 24 | 26 | 26 | 12 | 34 | 13 | 12 | 44 | 34 | 37 | 45
|
||||
; 16 | 26 | 36 | 24 | 23 | 23 | 25 | 26 | 14 | 22 | 12 | 16 | 35 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 26 | 26 | 12 | 34 | 14 | 12 | 36 | 34 | 37 | 45
|
||||
; 22 | 26 | 33 | 24 | 23 | 23 | 23 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 34 | 45
|
||||
; 22 | 26 | 25 | 27 | 24 | 24 | 24 | 26 | 12 | 35 | 12 | 12 | 34 | 35 | 35 | 45
|
||||
; 22 | 26 | 22 | 24 | 23 | 23 | 23 | 26 | 12 | 22 | 12 | 14 | 34 | 34 | 34 | 45
|
||||
; 22 | 25 | 25 | 27 | 24 | 24 | 24 | 26 | 12 | 34 | 12 | 12 | 34 | 34 | 34 | 45
|
||||
; 22 | 26 | 23 | 24 | 23 | 23 | 25 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 34 | 45
|
||||
; 22 | 25 | 25 | 27 | 26 | 24 | 26 | 26 | 12 | 34 | 13 | 13 | 36 | 34 | 37 | 45
|
||||
; 22 | 26 | 23 | 24 | 23 | 23 | 25 | 26 | 12 | 22 | 12 | 13 | 34 | 34 | 36 | 45
|
||||
; 22 | 25 | 25 | 27 | 35 | 24 | 26 | 26 | 12 | 34 | 14 | 12 | 36 | 34 | 37 | 45
|
||||
|
||||
section .text
|
||||
|
||||
@@ -919,7 +627,7 @@ NEWSYM settables
|
||||
mov dword[edi+0FDh*4],COpFDm8nd
|
||||
mov dword[edi+0FEh*4],COpFEm8
|
||||
mov dword[edi+0FFh*4],COpFFm8nd
|
||||
ret
|
||||
ret
|
||||
|
||||
NEWSYM settablem16
|
||||
mov dword[edi+01h*4],COp01m16
|
||||
@@ -1193,5 +901,3 @@ NEWSYM settableDm16
|
||||
mov dword[edi+0FDh*4],COpFDm16d
|
||||
mov dword[edi+0FFh*4],COpFFm16d
|
||||
ret
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user