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Integrated Snes9x OBC1 code. Metal Combat doesn't have any graphical problems anymore. Special thanks to Nach for assistance in fixing several bugs.

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This commit is contained in:
jbo_85
2006-03-26 19:01:17 +00:00
parent 6198c10f8b
commit 692a24520d
9 changed files with 244 additions and 213 deletions
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5
zsnes/src/Makefile.in
View File

@@ -36,7 +36,8 @@ CHIPSOBJ=${CHIPDIR}/sfxproc.o ${CHIPDIR}/fxemu2.o ${CHIPDIR}/dsp1proc.o\
${CHIPDIR}/sa1proc.o ${CHIPDIR}/sa1regs.o ${CHIPDIR}/dsp1emu.o\
${CHIPDIR}/st10proc.o ${CHIPDIR}/seta10.o ${CHIPDIR}/dsp2proc.o\
${CHIPDIR}/sdd1emu.o ${CHIPDIR}/c4emu.o ${CHIPDIR}/dsp4proc.o\
${CHIPDIR}/dsp4emu.o ${CHIPDIR}/dsp3proc.o ${CHIPDIR}/dsp3emu.o
${CHIPDIR}/dsp4emu.o ${CHIPDIR}/dsp3proc.o ${CHIPDIR}/dsp3emu.o\
${CHIPDIR}/obc1emu${OE} ${CHIPDIR}/obc1proc${OE}
CPUOBJ=${CPUDIR}/dma.o ${CPUDIR}/dsp.o ${CPUDIR}/dspproc.o ${CPUDIR}/execute.o\
${CPUDIR}/executec.o ${CPUDIR}/irq.o ${CPUDIR}/memory.o\
@@ -174,6 +175,8 @@ ${CHIPDIR}/fxemu2c.o: ${CHIPDIR}/fxemu2c.asm macros.mac ${CHIPDIR}/fxemu2.mac\
${CHIPDIR}/fxemu2c.mac
${CHIPDIR}/fxtable.o: ${CHIPDIR}/fxtable.asm macros.mac
${CHIPDIR}/sa1proc.o: ${CHIPDIR}/sa1proc.asm macros.mac
${CHIPDIR}/obc1emu.o: ${CHIPDIR}/obc1emu.c
${CHIPDIR}/obc1proc.o: ${CHIPDIR}/obc1proc.asm macros.mac
${CHIPDIR}/sa1regs.o: ${CHIPDIR}/sa1regs.asm macros.mac\
${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac
${CHIPDIR}/sdd1emu.o: ${CHIPDIR}/sdd1emu.c

141
zsnes/src/chips/obc1emu.c Normal file
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@@ -0,0 +1,141 @@
/*
Copyright (C) 1997-2006 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
http://www.zsnes.com
http://sourceforge.net/projects/zsnes
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
version 2 as published by the Free Software Foundation.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
typedef unsigned char bool8;
typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
typedef char int8;
typedef short int16;
typedef long int32;
//C++ in C
typedef unsigned char bool;
#define true 1
#define false 0
static uint8 *OBC1_RAM = 0;
int OBC1_Address;
int OBC1_BasePtr;
int OBC1_Shift;
uint16 obc1_address;
uint8 obc1_byte;
void GetOBC1 ()
{
switch(obc1_address) {
case 0x7ff0:
obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2)];
case 0x7ff1:
obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 1];
case 0x7ff2:
obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 2];
case 0x7ff3:
obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 3];
case 0x7ff4:
obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200];
default:
obc1_byte = OBC1_RAM[obc1_address & 0x1fff];
}
}
void SetOBC1 ()
{
switch(obc1_address) {
case 0x7ff0:
{
OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2)] = obc1_byte;
break;
}
case 0x7ff1:
{
OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 1] = obc1_byte;
break;
}
case 0x7ff2:
{
OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 2] = obc1_byte;
break;
}
case 0x7ff3:
{
OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 3] = obc1_byte;
break;
}
case 0x7ff4:
{
unsigned char Temp;
Temp = OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200];
Temp = (Temp & ~(3 << OBC1_Shift)) | ((obc1_byte & 3) << OBC1_Shift);
OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200] = Temp;
break;
}
case 0x7ff5:
{
if (obc1_byte & 1)
OBC1_BasePtr = 0x1800;
else
OBC1_BasePtr = 0x1c00;
break;
}
case 0x7ff6:
{
OBC1_Address = obc1_byte & 0x7f;
OBC1_Shift = (obc1_byte & 3) << 1;
break;
}
}
OBC1_RAM[obc1_address & 0x1fff] = obc1_byte;
}
void ResetOBC1()
{
if (OBC1_RAM[0x1ff5] & 1)
OBC1_BasePtr = 0x1800;
else
OBC1_BasePtr = 0x1c00;
OBC1_Address = OBC1_RAM[0x1ff6] & 0x7f;
OBC1_Shift = (OBC1_RAM[0x1ff6] & 3) << 1;
}
extern unsigned char *romdata;
void InitOBC()
{
OBC1_RAM = romdata+0x400000;
ResetOBC1();
}

80
zsnes/src/chips/obc1proc.asm Normal file
View File

@@ -0,0 +1,80 @@
;Copyright (C) 1997-2006 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
;
;http://www.zsnes.com
;http://sourceforge.net/projects/zsnes
;
;This program is free software; you can redistribute it and/or
;modify it under the terms of the GNU General Public License
;version 2 as published by the Free Software Foundation.
;
;This program is distributed in the hope that it will be useful,
;but WITHOUT ANY WARRANTY; without even the implied warranty of
;MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;GNU General Public License for more details.
;
;You should have received a copy of the GNU General Public License
;along with this program; if not, write to the Free Software
;Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
%include "macros.mac"
EXTSYM obc1_address,obc1_byte,SetOBC1,GetOBC1
EXTSYM regaccessbankr16,regaccessbankr8,regaccessbankw16,regaccessbankw8
SECTION .text
%macro RouteAccess 1
cmp ecx,06000h
jb %1
cmp ecx,08000h
jae %1
%endmacro
NEWSYM OBC1Read8b
RouteAccess regaccessbankr8
mov [obc1_address],cx
pushad
call GetOBC1
popad
mov al,[obc1_byte]
ret
NEWSYM OBC1Write8b
RouteAccess regaccessbankw8
mov [obc1_address],cx
mov [obc1_byte],al
pushad
call SetOBC1
popad
ret
NEWSYM OBC1Read16b
RouteAccess regaccessbankr16
mov [obc1_address],cx
pushad
call GetOBC1
mov al,[obc1_byte]
mov [obc1temp],al
inc word[obc1_address]
call GetOBC1
popad
mov al,[obc1temp]
mov ah,[obc1_byte]
ret
NEWSYM OBC1Write16b
RouteAccess regaccessbankw16
mov [obc1_address],cx
mov [obc1_byte],al
mov [obc1temp],ah
pushad
call SetOBC1
mov ah,[obc1temp]
mov [obc1_byte],ah
inc word[obc1_address]
call SetOBC1
popad
ret
SECTION .bss
NEWSYM obc1temp, resb 1

205
zsnes/src/cpu/memory.asm
View File

@@ -33,7 +33,7 @@ EXTSYM CurDecompPtr,PrevDecompPtr,CurDecompSize
EXTSYM SPCDecmPtr,SPCCompPtr,SPCCompCounter
EXTSYM ramsize,ramsizeand,sram,ram7fa
EXTSYM SA1Status,IRAM,CurBWPtr,SA1RAMArea
EXTSYM SA1Overflow,OBCEnable
EXTSYM SA1Overflow
EXTSYM Sdd1Mode,Sdd1Bank,Sdd1Addr,Sdd1NewAddr,memtabler8,AddrNoIncr,SDD1BankA
EXTSYM SDD1_init,SDD1_get_byte,BWShift,SA1BWPtr
@@ -657,206 +657,11 @@ NEWSYM C4ProcessSprites
ret
section .bss
NEWSYM SprValAdd, resb 1
C4Data resd 1
C4sprites resd 1
OBClog resd 1
NumSprites resb 1
OBCOldRegArray resb 1
section .text
NEWSYM InitOBC
pushad
mov esi,[romdata]
add esi,4096*1024
mov [C4RamR],esi
mov [C4RamW],esi
mov [C4Ram],esi
add dword[C4RamW],8192*4
add dword[C4Ram],8192*8
mov ecx,8192
.c4loop
mov dword[esi],OBCReadReg
mov dword[esi+8192*4],OBCWriteReg
mov dword[esi+8192*8],0
add esi,4
dec ecx
jnz .c4loop
mov esi,[romdata]
add esi,4096*1024
mov dword[esi+3A1Eh*4],OBCClear
mov dword[esi+3FF0h*4],OBCRegs
mov dword[esi+3FF1h*4],OBCRegs
mov dword[esi+3FF2h*4],OBCRegs
mov dword[esi+3FF3h*4],OBCRegs
mov dword[esi+3FF4h*4],OBCRegs
mov dword[esi+3FF5h*4],OBCRegs
mov dword[esi+3FF6h*4],OBCRegs
mov dword[esi+3FF7h*4],OBCRegs
popad
ret
OBCSprites:
pushad
mov byte[NumSprites],0
mov esi,[C4Ram]
mov edi,esi
add edi,1800h
add byte[OBCRegArray],2
and byte[OBCRegArray],0FEh
cmp byte[OBCRegArray],0FEh
je .ohno
cmp byte[OBCRegArray],0
je .ohno
jmp .okay
.ohno
mov al,[OBCOldRegArray]
mov [OBCRegArray],al
jmp .loop
.okay
mov al,[OBCRegArray]
mov [OBCOldRegArray],al
.loop
cmp byte[OBCRegArray],0
je .nomore
sub byte[OBCRegArray],2
xor ebx,ebx
mov bl,[esi+6]
shl ebx,2
; Get X,Y,OAM, and Attr
mov al,[esi+3] ;0,3
mov [edi+ebx],al
mov al,[esi+9]
mov [edi+ebx+1],al
mov al,[esi+10] ;2,10
mov [edi+ebx+2],al
mov al,[esi+0Bh]
mov [edi+ebx+3],al
xor ebx,ebx
mov bl,[esi+6]
shr ebx,2
add ebx,512
mov cl,[esi+6]
and cl,03h
add cl,cl
xor al,al
mov ah,0FCh
mov al,[esi+4] ;1,4
and al,03h
shl al,cl
rol ah,cl
and byte[edi+ebx],ah
or byte[edi+ebx],al
inc byte[NumSprites]
add esi,16
jmp .loop
.nomore
mov esi,[C4Ram]
mov edi,esi
add edi,1800h
; mov dword[edi+200h],0AAAAAAAAh
popad
ret
OBCClear:
call OBCSprites
mov byte[clearmem],1
mov dword[OBClog],0
ret
; Affected values: 0,1,2,3,4,6,7,9,A,B
; 0,1 - Another X value (unused?)
; 2 - OAM value
; 3/4 - X value (bits 0-8)
; 5 - N/A (not written to)
; 6 - OAM #
; 7 - Always 0?
; 9 - Y value (bits 0-7)
; A - OAM value
; B - OAM Status
; X,Y,OAM,Attr / xhighbit / OAM highbit / Sprite size
;bit 0 = OAM b8, bit 1-3 = palette number bit 4,5 = playfield priority
;bit 6 = horizontal flip bit 7 = horizonal flip
; Extra: bit 0 = X bit 8, bit 1 = Larger sprite size
SECTION .bss
OBCRegArray resb 8
clearmem resb 1
SECTION .data
OBCIncArray db 2,1,1,1,2,2,2,2
SECTION .text
OBCRegs:
pushad
sub ecx,1FF0h
cmp byte[clearmem],0
je near .noclearmem
cmp ecx,6
je .okay
popad
ret
.okay
mov dword[OBCRegArray],0
mov dword[OBCRegArray+4],0
mov byte[OBCRegArray],0FEh
mov byte[clearmem],0
.noclearmem
mov ebx,[C4Ram]
add ebx,1000h
add ebx,[OBClog]
inc dword[OBClog]
mov [ebx],cl
cmp cl,6
jne .notsix
add byte[OBCRegArray],2
mov bl,[OBCRegArray]
mov bh,bl
mov [OBCRegArray+1],bl
mov [OBCRegArray+2],bx
mov [OBCRegArray+4],bx
mov [OBCRegArray+6],bx
.notsix
xor ebx,ebx
mov bl,[OBCRegArray+ecx]
cmp byte[OBCIncArray+ecx],1
jne .noinc
or byte[OBCRegArray+ecx],1
.noinc
shl ebx,3
add ecx,ebx
add ecx,[C4Ram]
mov [ecx],al
; cmp dl,1
; jne .second
mov byte[ecx+8],0FFh
; jmp .first
;.second
; mov byte[ecx+16],0FFh
;.first
popad
ret
OBCReadReg:
add ecx,[C4Ram]
mov al,[ecx]
sub ecx,[C4Ram]
ret
OBCWriteReg
add ecx,[C4Ram]
mov [ecx],al
sub ecx,[C4Ram]
ret
NEWSYM InitC4
pushad
mov esi,[romdata]
@@ -2473,8 +2278,6 @@ NEWSYM regaccessbankr8
je .sfxram
cmp byte[C4Enable],1
je near .c4ram
cmp byte[OBCEnable],1
je near .c4ram
and ebx,7Fh
cmp bl,10h
jb .dsp1
@@ -2578,8 +2381,6 @@ NEWSYM regaccessbankr16
je .sfxram
cmp byte[C4Enable],1
je near .c4ram
cmp byte[OBCEnable],1
je near .c4ram
and ebx,7Fh
cmp bl,10h
jb .dsp1
@@ -2678,8 +2479,6 @@ NEWSYM regaccessbankw8
je .sfxram
cmp byte[C4Enable],1
je near .c4ram
cmp byte[OBCEnable],1
je near .c4ram
and ebx,7Fh
cmp bl,10h
jb .dsp1
@@ -2780,8 +2579,6 @@ NEWSYM regaccessbankw16
je .sfxram
cmp byte[C4Enable],1
je near .c4ram
cmp byte[OBCEnable],1
je near .c4ram
and ebx,7Fh
cmp bl,10h
jb .dsp1

2
zsnes/src/cpu/memtable.c
View File

@@ -261,6 +261,7 @@ void sfxaccessbankr8(), sfxaccessbankw8(), sfxaccessbankr16(), sfxaccessbankw16(
void sfxaccessbankr8b(), sfxaccessbankw8b(), sfxaccessbankr16b(), sfxaccessbankw16b();
void sfxaccessbankr8c(), sfxaccessbankw8c(), sfxaccessbankr16c(), sfxaccessbankw16c();
void sfxaccessbankr8d(), sfxaccessbankw8d(), sfxaccessbankr16d(), sfxaccessbankw16d();
void OBC1Read8b(), OBC1Write8b(), OBC1Read16b(), OBC1Write16b();
mrwp regbank = { regaccessbankr8, regaccessbankw8, regaccessbankr16, regaccessbankw16 };
mrwp membank = { memaccessbankr8, memaccessbankw8, memaccessbankr16, memaccessbankw16 };
@@ -283,6 +284,7 @@ mrwp sfxbank = { sfxaccessbankr8, sfxaccessbankw8, sfxaccessbankr16, sfxaccessba
mrwp sfxbankb = { sfxaccessbankr8b, sfxaccessbankw8b, sfxaccessbankr16b, sfxaccessbankw16b };
mrwp sfxbankc = { sfxaccessbankr8c, sfxaccessbankw8c, sfxaccessbankr16c, sfxaccessbankw16c };
mrwp sfxbankd = { sfxaccessbankr8d, sfxaccessbankw8d, sfxaccessbankr16d, sfxaccessbankw16d };
mrwp obc1bank = { OBC1Read8b, OBC1Write8b, OBC1Read16b, OBC1Write16b };
void SetAddressingModes()

1
zsnes/src/cpu/memtable.h
View File

@@ -39,6 +39,7 @@ extern mrwp sa1regbank, sa1rambank, sa1rambankb;
extern mrwp dsp1bank, dsp2bank, dsp3bank, dsp4bank;
extern mrwp setabank, setabanka;
extern mrwp sfxbank, sfxbankb, sfxbankc, sfxbankd;
extern mrwp obc1bank;
/*
rep_stosd is my name for a 'copy <num> times a function pointer <func_ptr> into

8
zsnes/src/init.asm
View File

@@ -48,7 +48,7 @@ EXTSYM opexec358cph,spcextraram,opexec358cphb,prevoamptr,reg1read,reg2read
EXTSYM reg3read,reg4read,resolutn,romdata,scrndis,spcP,SPCRAM,spcnumread
EXTSYM tableD,timeron,vidbright,SPC700read,SPC700write,spc700read
EXTSYM GUIReset,InitC4,SA1Reset,SetAddressingModesSA1,SDD1BankA,SPC7110init
EXTSYM RTCinit,InitOBC,memaccessspc7110r8,memaccessspc7110r16,memaccessspc7110w8
EXTSYM RTCinit,memaccessspc7110r8,memaccessspc7110r16,memaccessspc7110w8
EXTSYM memaccessspc7110w16,ram7f,snesmap2,snesmmap,MultiTap,memaccessbankr848mb
EXTSYM memaccessbankr1648mb,procexecloop,ram7fa,wramdata,wramdataa,fname,fnames
EXTSYM GetCurDir,SRAMChdir,cfgloadsdir,fnamest,statefileloc,InitDir,InitDrive
@@ -60,7 +60,7 @@ EXTSYM device1,device2,processmouse1,processmouse2,cpalval
;initc.c
EXTSYM clearmem,clearSPCRAM,PatchUsingIPS,ZOpenFileName,loadROM,SPC7110IndexSize
EXTSYM SPC7PackIndexLoad,IntlEHi,C4Enable,SPC7110Enable,RTCEnable,SA1Enable
EXTSYM SDD1Enable,OBCEnable,SFXEnable,BSEnable,clearvidsound,headerhack,SetupROM
EXTSYM SDD1Enable,SFXEnable,BSEnable,clearvidsound,headerhack,SetupROM
%ifdef __UNIXSDL__
EXTSYM LoadDir,popdir,pushdir
@@ -1041,10 +1041,6 @@ NEWSYM init65816
call SetAddressingModesSA1
popad
.nosa1init
cmp byte[OBCEnable],0
je .noobcinit
call InitOBC
.noobcinit
cmp byte[C4Enable],0
je .noc4init
mov byte[osm2dis],1

10
zsnes/src/initc.c
View File

@@ -1943,7 +1943,7 @@ extern unsigned short totlines;
void SetAddressingModes(), GenerateBank0Table();
void SetAddressingModesSA1(), GenerateBank0TableSA1();
void calculate_state_sizes(), InitRewindVars();
void InitDSP(), InitDSP2(), InitDSP3(), InitDSP4(), InitFxTables(), initregr(), initregw();
void InitDSP(), InitDSP2(), InitDSP3(), InitDSP4(), InitOBC(), InitFxTables(), initregr(), initregw();
void SPC7110Load(), DOSClearScreen(), dosmakepal();
void CheckROMType()
@@ -2002,6 +2002,14 @@ void CheckROMType()
map_mem(0x30, &dsp4bank, 0x10);
}
if (OBCEnable)
{
InitOBC();
map_mem(0x00, &obc1bank, 0x40);
map_mem(0x80, &obc1bank, 0x40);
}
if (SFXEnable)
{
// Setup SuperFX stuff

5
zsnes/src/makefile.ms
View File

@@ -152,7 +152,8 @@ CHIPSOBJ=${CHIPDIR}/dsp1emu${OE} ${CHIPDIR}/fxemu2${OE} ${CHIPDIR}/sfxproc${OE}\
${CHIPDIR}/sa1proc${OE} ${CHIPDIR}/sa1regs${OE} ${CHIPDIR}/dsp1proc${OE}\
${CHIPDIR}/st10proc${OE} ${CHIPDIR}/seta10${OE} ${CHIPDIR}/dsp2proc${OE}\
${CHIPDIR}/sdd1emu${OE} ${CHIPDIR}/c4emu${OE} ${CHIPDIR}/dsp4proc${OE}\
${CHIPDIR}/dsp4emu${OE} ${CHIPDIR}/dsp3proc${OE} ${CHIPDIR}/dsp3emu${OE}
${CHIPDIR}/dsp4emu${OE} ${CHIPDIR}/dsp3proc${OE} ${CHIPDIR}/dsp3emu${OE}\
${CHIPDIR}/obc1emu${OE} ${CHIPDIR}/obc1proc${OE}
CPUOBJ=${CPUDIR}/dma${OE} ${CPUDIR}/dsp${OE} ${CPUDIR}/dspproc${OE}\
${CPUDIR}/execute${OE} ${CPUDIR}/executec${OE} ${CPUDIR}/irq${OE}\
@@ -289,6 +290,8 @@ ${CHIPDIR}/fxemu2b${OE}: ${CHIPDIR}/fxemu2b.asm macros.mac ${CHIPDIR}/fxemu2.mac
${CHIPDIR}/fxemu2c${OE}: ${CHIPDIR}/fxemu2c.asm macros.mac ${CHIPDIR}/fxemu2.mac\
${CHIPDIR}/fxemu2c.mac
${CHIPDIR}/fxtable${OE}: ${CHIPDIR}/fxtable.asm macros.mac
${CHIPDIR}/obc1emu${OE}: ${CHIPDIR}/obc1emu.c
${CHIPDIR}/obc1proc${OE}: ${CHIPDIR}/obc1proc.asm macros.mac
${CHIPDIR}/sa1proc${OE}: ${CHIPDIR}/sa1proc.asm macros.mac
${CHIPDIR}/sa1regs${OE}: ${CHIPDIR}/sa1regs.asm macros.mac\
${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac