Integrated Snes9x OBC1 code. Metal Combat doesn't have any graphical problems anymore. Special thanks to Nach for assistance in fixing several bugs.
This commit is contained in:
@@ -36,7 +36,8 @@ CHIPSOBJ=${CHIPDIR}/sfxproc.o ${CHIPDIR}/fxemu2.o ${CHIPDIR}/dsp1proc.o\
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${CHIPDIR}/sa1proc.o ${CHIPDIR}/sa1regs.o ${CHIPDIR}/dsp1emu.o\
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${CHIPDIR}/sa1proc.o ${CHIPDIR}/sa1regs.o ${CHIPDIR}/dsp1emu.o\
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${CHIPDIR}/st10proc.o ${CHIPDIR}/seta10.o ${CHIPDIR}/dsp2proc.o\
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${CHIPDIR}/st10proc.o ${CHIPDIR}/seta10.o ${CHIPDIR}/dsp2proc.o\
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${CHIPDIR}/sdd1emu.o ${CHIPDIR}/c4emu.o ${CHIPDIR}/dsp4proc.o\
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${CHIPDIR}/sdd1emu.o ${CHIPDIR}/c4emu.o ${CHIPDIR}/dsp4proc.o\
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${CHIPDIR}/dsp4emu.o ${CHIPDIR}/dsp3proc.o ${CHIPDIR}/dsp3emu.o
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${CHIPDIR}/dsp4emu.o ${CHIPDIR}/dsp3proc.o ${CHIPDIR}/dsp3emu.o\
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${CHIPDIR}/obc1emu${OE} ${CHIPDIR}/obc1proc${OE}
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CPUOBJ=${CPUDIR}/dma.o ${CPUDIR}/dsp.o ${CPUDIR}/dspproc.o ${CPUDIR}/execute.o\
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CPUOBJ=${CPUDIR}/dma.o ${CPUDIR}/dsp.o ${CPUDIR}/dspproc.o ${CPUDIR}/execute.o\
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${CPUDIR}/executec.o ${CPUDIR}/irq.o ${CPUDIR}/memory.o\
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${CPUDIR}/executec.o ${CPUDIR}/irq.o ${CPUDIR}/memory.o\
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@@ -174,6 +175,8 @@ ${CHIPDIR}/fxemu2c.o: ${CHIPDIR}/fxemu2c.asm macros.mac ${CHIPDIR}/fxemu2.mac\
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${CHIPDIR}/fxemu2c.mac
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${CHIPDIR}/fxemu2c.mac
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${CHIPDIR}/fxtable.o: ${CHIPDIR}/fxtable.asm macros.mac
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${CHIPDIR}/fxtable.o: ${CHIPDIR}/fxtable.asm macros.mac
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${CHIPDIR}/sa1proc.o: ${CHIPDIR}/sa1proc.asm macros.mac
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${CHIPDIR}/sa1proc.o: ${CHIPDIR}/sa1proc.asm macros.mac
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${CHIPDIR}/obc1emu.o: ${CHIPDIR}/obc1emu.c
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${CHIPDIR}/obc1proc.o: ${CHIPDIR}/obc1proc.asm macros.mac
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${CHIPDIR}/sa1regs.o: ${CHIPDIR}/sa1regs.asm macros.mac\
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${CHIPDIR}/sa1regs.o: ${CHIPDIR}/sa1regs.asm macros.mac\
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${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac
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${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac
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${CHIPDIR}/sdd1emu.o: ${CHIPDIR}/sdd1emu.c
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${CHIPDIR}/sdd1emu.o: ${CHIPDIR}/sdd1emu.c
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141
zsnes/src/chips/obc1emu.c
Normal file
141
zsnes/src/chips/obc1emu.c
Normal file
@@ -0,0 +1,141 @@
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/*
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Copyright (C) 1997-2006 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
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http://www.zsnes.com
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http://sourceforge.net/projects/zsnes
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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typedef unsigned char bool8;
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typedef unsigned char uint8;
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typedef unsigned short uint16;
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typedef unsigned int uint32;
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typedef char int8;
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typedef short int16;
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typedef long int32;
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//C++ in C
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typedef unsigned char bool;
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#define true 1
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#define false 0
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static uint8 *OBC1_RAM = 0;
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int OBC1_Address;
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int OBC1_BasePtr;
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int OBC1_Shift;
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uint16 obc1_address;
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uint8 obc1_byte;
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void GetOBC1 ()
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{
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switch(obc1_address) {
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case 0x7ff0:
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obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2)];
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case 0x7ff1:
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obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 1];
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case 0x7ff2:
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obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 2];
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case 0x7ff3:
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obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 3];
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case 0x7ff4:
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obc1_byte = OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200];
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default:
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obc1_byte = OBC1_RAM[obc1_address & 0x1fff];
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}
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}
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void SetOBC1 ()
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{
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switch(obc1_address) {
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case 0x7ff0:
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{
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OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2)] = obc1_byte;
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break;
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}
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case 0x7ff1:
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{
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OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 1] = obc1_byte;
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break;
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}
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case 0x7ff2:
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{
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OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 2] = obc1_byte;
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break;
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}
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case 0x7ff3:
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{
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OBC1_RAM[OBC1_BasePtr + (OBC1_Address << 2) + 3] = obc1_byte;
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break;
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}
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case 0x7ff4:
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{
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unsigned char Temp;
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Temp = OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200];
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Temp = (Temp & ~(3 << OBC1_Shift)) | ((obc1_byte & 3) << OBC1_Shift);
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OBC1_RAM[OBC1_BasePtr + (OBC1_Address >> 2) + 0x200] = Temp;
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break;
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}
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case 0x7ff5:
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{
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if (obc1_byte & 1)
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OBC1_BasePtr = 0x1800;
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else
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OBC1_BasePtr = 0x1c00;
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break;
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}
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case 0x7ff6:
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{
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OBC1_Address = obc1_byte & 0x7f;
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OBC1_Shift = (obc1_byte & 3) << 1;
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break;
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}
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}
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OBC1_RAM[obc1_address & 0x1fff] = obc1_byte;
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}
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void ResetOBC1()
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{
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if (OBC1_RAM[0x1ff5] & 1)
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OBC1_BasePtr = 0x1800;
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else
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OBC1_BasePtr = 0x1c00;
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OBC1_Address = OBC1_RAM[0x1ff6] & 0x7f;
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OBC1_Shift = (OBC1_RAM[0x1ff6] & 3) << 1;
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}
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extern unsigned char *romdata;
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void InitOBC()
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{
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OBC1_RAM = romdata+0x400000;
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ResetOBC1();
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}
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80
zsnes/src/chips/obc1proc.asm
Normal file
80
zsnes/src/chips/obc1proc.asm
Normal file
@@ -0,0 +1,80 @@
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;Copyright (C) 1997-2006 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach )
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;
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;http://www.zsnes.com
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;http://sourceforge.net/projects/zsnes
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;
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;This program is free software; you can redistribute it and/or
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;modify it under the terms of the GNU General Public License
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;version 2 as published by the Free Software Foundation.
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;
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;This program is distributed in the hope that it will be useful,
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;but WITHOUT ANY WARRANTY; without even the implied warranty of
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;MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;GNU General Public License for more details.
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;
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;You should have received a copy of the GNU General Public License
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;along with this program; if not, write to the Free Software
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;Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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%include "macros.mac"
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EXTSYM obc1_address,obc1_byte,SetOBC1,GetOBC1
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EXTSYM regaccessbankr16,regaccessbankr8,regaccessbankw16,regaccessbankw8
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SECTION .text
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%macro RouteAccess 1
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cmp ecx,06000h
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jb %1
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cmp ecx,08000h
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jae %1
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%endmacro
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NEWSYM OBC1Read8b
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RouteAccess regaccessbankr8
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mov [obc1_address],cx
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pushad
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call GetOBC1
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popad
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mov al,[obc1_byte]
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ret
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NEWSYM OBC1Write8b
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RouteAccess regaccessbankw8
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mov [obc1_address],cx
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mov [obc1_byte],al
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pushad
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call SetOBC1
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popad
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ret
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NEWSYM OBC1Read16b
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RouteAccess regaccessbankr16
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mov [obc1_address],cx
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pushad
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call GetOBC1
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mov al,[obc1_byte]
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mov [obc1temp],al
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inc word[obc1_address]
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call GetOBC1
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popad
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mov al,[obc1temp]
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mov ah,[obc1_byte]
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ret
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NEWSYM OBC1Write16b
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RouteAccess regaccessbankw16
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mov [obc1_address],cx
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mov [obc1_byte],al
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mov [obc1temp],ah
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pushad
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call SetOBC1
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mov ah,[obc1temp]
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mov [obc1_byte],ah
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inc word[obc1_address]
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call SetOBC1
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popad
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ret
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SECTION .bss
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NEWSYM obc1temp, resb 1
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@@ -33,7 +33,7 @@ EXTSYM CurDecompPtr,PrevDecompPtr,CurDecompSize
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EXTSYM SPCDecmPtr,SPCCompPtr,SPCCompCounter
|
EXTSYM SPCDecmPtr,SPCCompPtr,SPCCompCounter
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EXTSYM ramsize,ramsizeand,sram,ram7fa
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EXTSYM ramsize,ramsizeand,sram,ram7fa
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EXTSYM SA1Status,IRAM,CurBWPtr,SA1RAMArea
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EXTSYM SA1Status,IRAM,CurBWPtr,SA1RAMArea
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EXTSYM SA1Overflow,OBCEnable
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EXTSYM SA1Overflow
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EXTSYM Sdd1Mode,Sdd1Bank,Sdd1Addr,Sdd1NewAddr,memtabler8,AddrNoIncr,SDD1BankA
|
EXTSYM Sdd1Mode,Sdd1Bank,Sdd1Addr,Sdd1NewAddr,memtabler8,AddrNoIncr,SDD1BankA
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EXTSYM SDD1_init,SDD1_get_byte,BWShift,SA1BWPtr
|
EXTSYM SDD1_init,SDD1_get_byte,BWShift,SA1BWPtr
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@@ -657,206 +657,11 @@ NEWSYM C4ProcessSprites
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ret
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ret
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section .bss
|
section .bss
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NEWSYM SprValAdd, resb 1
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C4Data resd 1
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C4Data resd 1
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C4sprites resd 1
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C4sprites resd 1
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OBClog resd 1
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NumSprites resb 1
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OBCOldRegArray resb 1
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|
||||||
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section .text
|
|
||||||
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|
||||||
NEWSYM InitOBC
|
|
||||||
pushad
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|
||||||
mov esi,[romdata]
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|
||||||
add esi,4096*1024
|
|
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mov [C4RamR],esi
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|
||||||
mov [C4RamW],esi
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|
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mov [C4Ram],esi
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|
||||||
add dword[C4RamW],8192*4
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|
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add dword[C4Ram],8192*8
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|
||||||
mov ecx,8192
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|
||||||
.c4loop
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|
||||||
mov dword[esi],OBCReadReg
|
|
||||||
mov dword[esi+8192*4],OBCWriteReg
|
|
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mov dword[esi+8192*8],0
|
|
||||||
add esi,4
|
|
||||||
dec ecx
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|
||||||
jnz .c4loop
|
|
||||||
mov esi,[romdata]
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|
||||||
add esi,4096*1024
|
|
||||||
mov dword[esi+3A1Eh*4],OBCClear
|
|
||||||
mov dword[esi+3FF0h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF1h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF2h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF3h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF4h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF5h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF6h*4],OBCRegs
|
|
||||||
mov dword[esi+3FF7h*4],OBCRegs
|
|
||||||
popad
|
|
||||||
ret
|
|
||||||
|
|
||||||
OBCSprites:
|
|
||||||
pushad
|
|
||||||
mov byte[NumSprites],0
|
|
||||||
mov esi,[C4Ram]
|
|
||||||
mov edi,esi
|
|
||||||
add edi,1800h
|
|
||||||
add byte[OBCRegArray],2
|
|
||||||
and byte[OBCRegArray],0FEh
|
|
||||||
cmp byte[OBCRegArray],0FEh
|
|
||||||
je .ohno
|
|
||||||
cmp byte[OBCRegArray],0
|
|
||||||
je .ohno
|
|
||||||
jmp .okay
|
|
||||||
.ohno
|
|
||||||
mov al,[OBCOldRegArray]
|
|
||||||
mov [OBCRegArray],al
|
|
||||||
jmp .loop
|
|
||||||
.okay
|
|
||||||
mov al,[OBCRegArray]
|
|
||||||
mov [OBCOldRegArray],al
|
|
||||||
.loop
|
|
||||||
cmp byte[OBCRegArray],0
|
|
||||||
je .nomore
|
|
||||||
sub byte[OBCRegArray],2
|
|
||||||
xor ebx,ebx
|
|
||||||
mov bl,[esi+6]
|
|
||||||
shl ebx,2
|
|
||||||
|
|
||||||
; Get X,Y,OAM, and Attr
|
|
||||||
mov al,[esi+3] ;0,3
|
|
||||||
mov [edi+ebx],al
|
|
||||||
mov al,[esi+9]
|
|
||||||
mov [edi+ebx+1],al
|
|
||||||
mov al,[esi+10] ;2,10
|
|
||||||
mov [edi+ebx+2],al
|
|
||||||
mov al,[esi+0Bh]
|
|
||||||
mov [edi+ebx+3],al
|
|
||||||
|
|
||||||
xor ebx,ebx
|
|
||||||
mov bl,[esi+6]
|
|
||||||
shr ebx,2
|
|
||||||
add ebx,512
|
|
||||||
mov cl,[esi+6]
|
|
||||||
and cl,03h
|
|
||||||
add cl,cl
|
|
||||||
|
|
||||||
xor al,al
|
|
||||||
mov ah,0FCh
|
|
||||||
mov al,[esi+4] ;1,4
|
|
||||||
and al,03h
|
|
||||||
shl al,cl
|
|
||||||
rol ah,cl
|
|
||||||
and byte[edi+ebx],ah
|
|
||||||
or byte[edi+ebx],al
|
|
||||||
|
|
||||||
inc byte[NumSprites]
|
|
||||||
add esi,16
|
|
||||||
jmp .loop
|
|
||||||
.nomore
|
|
||||||
|
|
||||||
mov esi,[C4Ram]
|
|
||||||
mov edi,esi
|
|
||||||
add edi,1800h
|
|
||||||
; mov dword[edi+200h],0AAAAAAAAh
|
|
||||||
popad
|
|
||||||
ret
|
|
||||||
|
|
||||||
OBCClear:
|
|
||||||
call OBCSprites
|
|
||||||
mov byte[clearmem],1
|
|
||||||
mov dword[OBClog],0
|
|
||||||
ret
|
|
||||||
|
|
||||||
; Affected values: 0,1,2,3,4,6,7,9,A,B
|
|
||||||
; 0,1 - Another X value (unused?)
|
|
||||||
; 2 - OAM value
|
|
||||||
; 3/4 - X value (bits 0-8)
|
|
||||||
; 5 - N/A (not written to)
|
|
||||||
; 6 - OAM #
|
|
||||||
; 7 - Always 0?
|
|
||||||
; 9 - Y value (bits 0-7)
|
|
||||||
; A - OAM value
|
|
||||||
; B - OAM Status
|
|
||||||
; X,Y,OAM,Attr / xhighbit / OAM highbit / Sprite size
|
|
||||||
;bit 0 = OAM b8, bit 1-3 = palette number bit 4,5 = playfield priority
|
|
||||||
;bit 6 = horizontal flip bit 7 = horizonal flip
|
|
||||||
; Extra: bit 0 = X bit 8, bit 1 = Larger sprite size
|
|
||||||
|
|
||||||
SECTION .bss
|
|
||||||
OBCRegArray resb 8
|
|
||||||
clearmem resb 1
|
|
||||||
SECTION .data
|
|
||||||
OBCIncArray db 2,1,1,1,2,2,2,2
|
|
||||||
SECTION .text
|
SECTION .text
|
||||||
|
|
||||||
OBCRegs:
|
|
||||||
pushad
|
|
||||||
sub ecx,1FF0h
|
|
||||||
|
|
||||||
cmp byte[clearmem],0
|
|
||||||
je near .noclearmem
|
|
||||||
cmp ecx,6
|
|
||||||
je .okay
|
|
||||||
popad
|
|
||||||
ret
|
|
||||||
.okay
|
|
||||||
mov dword[OBCRegArray],0
|
|
||||||
mov dword[OBCRegArray+4],0
|
|
||||||
mov byte[OBCRegArray],0FEh
|
|
||||||
mov byte[clearmem],0
|
|
||||||
.noclearmem
|
|
||||||
|
|
||||||
mov ebx,[C4Ram]
|
|
||||||
add ebx,1000h
|
|
||||||
add ebx,[OBClog]
|
|
||||||
inc dword[OBClog]
|
|
||||||
mov [ebx],cl
|
|
||||||
cmp cl,6
|
|
||||||
jne .notsix
|
|
||||||
add byte[OBCRegArray],2
|
|
||||||
mov bl,[OBCRegArray]
|
|
||||||
mov bh,bl
|
|
||||||
mov [OBCRegArray+1],bl
|
|
||||||
mov [OBCRegArray+2],bx
|
|
||||||
mov [OBCRegArray+4],bx
|
|
||||||
mov [OBCRegArray+6],bx
|
|
||||||
.notsix
|
|
||||||
|
|
||||||
xor ebx,ebx
|
|
||||||
mov bl,[OBCRegArray+ecx]
|
|
||||||
cmp byte[OBCIncArray+ecx],1
|
|
||||||
jne .noinc
|
|
||||||
or byte[OBCRegArray+ecx],1
|
|
||||||
.noinc
|
|
||||||
shl ebx,3
|
|
||||||
add ecx,ebx
|
|
||||||
add ecx,[C4Ram]
|
|
||||||
mov [ecx],al
|
|
||||||
; cmp dl,1
|
|
||||||
; jne .second
|
|
||||||
mov byte[ecx+8],0FFh
|
|
||||||
; jmp .first
|
|
||||||
;.second
|
|
||||||
; mov byte[ecx+16],0FFh
|
|
||||||
;.first
|
|
||||||
popad
|
|
||||||
ret
|
|
||||||
|
|
||||||
OBCReadReg:
|
|
||||||
add ecx,[C4Ram]
|
|
||||||
mov al,[ecx]
|
|
||||||
sub ecx,[C4Ram]
|
|
||||||
ret
|
|
||||||
|
|
||||||
OBCWriteReg
|
|
||||||
add ecx,[C4Ram]
|
|
||||||
mov [ecx],al
|
|
||||||
sub ecx,[C4Ram]
|
|
||||||
ret
|
|
||||||
|
|
||||||
NEWSYM InitC4
|
NEWSYM InitC4
|
||||||
pushad
|
pushad
|
||||||
mov esi,[romdata]
|
mov esi,[romdata]
|
||||||
@@ -2473,8 +2278,6 @@ NEWSYM regaccessbankr8
|
|||||||
je .sfxram
|
je .sfxram
|
||||||
cmp byte[C4Enable],1
|
cmp byte[C4Enable],1
|
||||||
je near .c4ram
|
je near .c4ram
|
||||||
cmp byte[OBCEnable],1
|
|
||||||
je near .c4ram
|
|
||||||
and ebx,7Fh
|
and ebx,7Fh
|
||||||
cmp bl,10h
|
cmp bl,10h
|
||||||
jb .dsp1
|
jb .dsp1
|
||||||
@@ -2578,8 +2381,6 @@ NEWSYM regaccessbankr16
|
|||||||
je .sfxram
|
je .sfxram
|
||||||
cmp byte[C4Enable],1
|
cmp byte[C4Enable],1
|
||||||
je near .c4ram
|
je near .c4ram
|
||||||
cmp byte[OBCEnable],1
|
|
||||||
je near .c4ram
|
|
||||||
and ebx,7Fh
|
and ebx,7Fh
|
||||||
cmp bl,10h
|
cmp bl,10h
|
||||||
jb .dsp1
|
jb .dsp1
|
||||||
@@ -2678,8 +2479,6 @@ NEWSYM regaccessbankw8
|
|||||||
je .sfxram
|
je .sfxram
|
||||||
cmp byte[C4Enable],1
|
cmp byte[C4Enable],1
|
||||||
je near .c4ram
|
je near .c4ram
|
||||||
cmp byte[OBCEnable],1
|
|
||||||
je near .c4ram
|
|
||||||
and ebx,7Fh
|
and ebx,7Fh
|
||||||
cmp bl,10h
|
cmp bl,10h
|
||||||
jb .dsp1
|
jb .dsp1
|
||||||
@@ -2780,8 +2579,6 @@ NEWSYM regaccessbankw16
|
|||||||
je .sfxram
|
je .sfxram
|
||||||
cmp byte[C4Enable],1
|
cmp byte[C4Enable],1
|
||||||
je near .c4ram
|
je near .c4ram
|
||||||
cmp byte[OBCEnable],1
|
|
||||||
je near .c4ram
|
|
||||||
and ebx,7Fh
|
and ebx,7Fh
|
||||||
cmp bl,10h
|
cmp bl,10h
|
||||||
jb .dsp1
|
jb .dsp1
|
||||||
|
|||||||
@@ -261,6 +261,7 @@ void sfxaccessbankr8(), sfxaccessbankw8(), sfxaccessbankr16(), sfxaccessbankw16(
|
|||||||
void sfxaccessbankr8b(), sfxaccessbankw8b(), sfxaccessbankr16b(), sfxaccessbankw16b();
|
void sfxaccessbankr8b(), sfxaccessbankw8b(), sfxaccessbankr16b(), sfxaccessbankw16b();
|
||||||
void sfxaccessbankr8c(), sfxaccessbankw8c(), sfxaccessbankr16c(), sfxaccessbankw16c();
|
void sfxaccessbankr8c(), sfxaccessbankw8c(), sfxaccessbankr16c(), sfxaccessbankw16c();
|
||||||
void sfxaccessbankr8d(), sfxaccessbankw8d(), sfxaccessbankr16d(), sfxaccessbankw16d();
|
void sfxaccessbankr8d(), sfxaccessbankw8d(), sfxaccessbankr16d(), sfxaccessbankw16d();
|
||||||
|
void OBC1Read8b(), OBC1Write8b(), OBC1Read16b(), OBC1Write16b();
|
||||||
|
|
||||||
mrwp regbank = { regaccessbankr8, regaccessbankw8, regaccessbankr16, regaccessbankw16 };
|
mrwp regbank = { regaccessbankr8, regaccessbankw8, regaccessbankr16, regaccessbankw16 };
|
||||||
mrwp membank = { memaccessbankr8, memaccessbankw8, memaccessbankr16, memaccessbankw16 };
|
mrwp membank = { memaccessbankr8, memaccessbankw8, memaccessbankr16, memaccessbankw16 };
|
||||||
@@ -283,6 +284,7 @@ mrwp sfxbank = { sfxaccessbankr8, sfxaccessbankw8, sfxaccessbankr16, sfxaccessba
|
|||||||
mrwp sfxbankb = { sfxaccessbankr8b, sfxaccessbankw8b, sfxaccessbankr16b, sfxaccessbankw16b };
|
mrwp sfxbankb = { sfxaccessbankr8b, sfxaccessbankw8b, sfxaccessbankr16b, sfxaccessbankw16b };
|
||||||
mrwp sfxbankc = { sfxaccessbankr8c, sfxaccessbankw8c, sfxaccessbankr16c, sfxaccessbankw16c };
|
mrwp sfxbankc = { sfxaccessbankr8c, sfxaccessbankw8c, sfxaccessbankr16c, sfxaccessbankw16c };
|
||||||
mrwp sfxbankd = { sfxaccessbankr8d, sfxaccessbankw8d, sfxaccessbankr16d, sfxaccessbankw16d };
|
mrwp sfxbankd = { sfxaccessbankr8d, sfxaccessbankw8d, sfxaccessbankr16d, sfxaccessbankw16d };
|
||||||
|
mrwp obc1bank = { OBC1Read8b, OBC1Write8b, OBC1Read16b, OBC1Write16b };
|
||||||
|
|
||||||
|
|
||||||
void SetAddressingModes()
|
void SetAddressingModes()
|
||||||
|
|||||||
@@ -39,6 +39,7 @@ extern mrwp sa1regbank, sa1rambank, sa1rambankb;
|
|||||||
extern mrwp dsp1bank, dsp2bank, dsp3bank, dsp4bank;
|
extern mrwp dsp1bank, dsp2bank, dsp3bank, dsp4bank;
|
||||||
extern mrwp setabank, setabanka;
|
extern mrwp setabank, setabanka;
|
||||||
extern mrwp sfxbank, sfxbankb, sfxbankc, sfxbankd;
|
extern mrwp sfxbank, sfxbankb, sfxbankc, sfxbankd;
|
||||||
|
extern mrwp obc1bank;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
rep_stosd is my name for a 'copy <num> times a function pointer <func_ptr> into
|
rep_stosd is my name for a 'copy <num> times a function pointer <func_ptr> into
|
||||||
|
|||||||
@@ -48,7 +48,7 @@ EXTSYM opexec358cph,spcextraram,opexec358cphb,prevoamptr,reg1read,reg2read
|
|||||||
EXTSYM reg3read,reg4read,resolutn,romdata,scrndis,spcP,SPCRAM,spcnumread
|
EXTSYM reg3read,reg4read,resolutn,romdata,scrndis,spcP,SPCRAM,spcnumread
|
||||||
EXTSYM tableD,timeron,vidbright,SPC700read,SPC700write,spc700read
|
EXTSYM tableD,timeron,vidbright,SPC700read,SPC700write,spc700read
|
||||||
EXTSYM GUIReset,InitC4,SA1Reset,SetAddressingModesSA1,SDD1BankA,SPC7110init
|
EXTSYM GUIReset,InitC4,SA1Reset,SetAddressingModesSA1,SDD1BankA,SPC7110init
|
||||||
EXTSYM RTCinit,InitOBC,memaccessspc7110r8,memaccessspc7110r16,memaccessspc7110w8
|
EXTSYM RTCinit,memaccessspc7110r8,memaccessspc7110r16,memaccessspc7110w8
|
||||||
EXTSYM memaccessspc7110w16,ram7f,snesmap2,snesmmap,MultiTap,memaccessbankr848mb
|
EXTSYM memaccessspc7110w16,ram7f,snesmap2,snesmmap,MultiTap,memaccessbankr848mb
|
||||||
EXTSYM memaccessbankr1648mb,procexecloop,ram7fa,wramdata,wramdataa,fname,fnames
|
EXTSYM memaccessbankr1648mb,procexecloop,ram7fa,wramdata,wramdataa,fname,fnames
|
||||||
EXTSYM GetCurDir,SRAMChdir,cfgloadsdir,fnamest,statefileloc,InitDir,InitDrive
|
EXTSYM GetCurDir,SRAMChdir,cfgloadsdir,fnamest,statefileloc,InitDir,InitDrive
|
||||||
@@ -60,7 +60,7 @@ EXTSYM device1,device2,processmouse1,processmouse2,cpalval
|
|||||||
;initc.c
|
;initc.c
|
||||||
EXTSYM clearmem,clearSPCRAM,PatchUsingIPS,ZOpenFileName,loadROM,SPC7110IndexSize
|
EXTSYM clearmem,clearSPCRAM,PatchUsingIPS,ZOpenFileName,loadROM,SPC7110IndexSize
|
||||||
EXTSYM SPC7PackIndexLoad,IntlEHi,C4Enable,SPC7110Enable,RTCEnable,SA1Enable
|
EXTSYM SPC7PackIndexLoad,IntlEHi,C4Enable,SPC7110Enable,RTCEnable,SA1Enable
|
||||||
EXTSYM SDD1Enable,OBCEnable,SFXEnable,BSEnable,clearvidsound,headerhack,SetupROM
|
EXTSYM SDD1Enable,SFXEnable,BSEnable,clearvidsound,headerhack,SetupROM
|
||||||
|
|
||||||
%ifdef __UNIXSDL__
|
%ifdef __UNIXSDL__
|
||||||
EXTSYM LoadDir,popdir,pushdir
|
EXTSYM LoadDir,popdir,pushdir
|
||||||
@@ -1041,10 +1041,6 @@ NEWSYM init65816
|
|||||||
call SetAddressingModesSA1
|
call SetAddressingModesSA1
|
||||||
popad
|
popad
|
||||||
.nosa1init
|
.nosa1init
|
||||||
cmp byte[OBCEnable],0
|
|
||||||
je .noobcinit
|
|
||||||
call InitOBC
|
|
||||||
.noobcinit
|
|
||||||
cmp byte[C4Enable],0
|
cmp byte[C4Enable],0
|
||||||
je .noc4init
|
je .noc4init
|
||||||
mov byte[osm2dis],1
|
mov byte[osm2dis],1
|
||||||
|
|||||||
@@ -1943,7 +1943,7 @@ extern unsigned short totlines;
|
|||||||
void SetAddressingModes(), GenerateBank0Table();
|
void SetAddressingModes(), GenerateBank0Table();
|
||||||
void SetAddressingModesSA1(), GenerateBank0TableSA1();
|
void SetAddressingModesSA1(), GenerateBank0TableSA1();
|
||||||
void calculate_state_sizes(), InitRewindVars();
|
void calculate_state_sizes(), InitRewindVars();
|
||||||
void InitDSP(), InitDSP2(), InitDSP3(), InitDSP4(), InitFxTables(), initregr(), initregw();
|
void InitDSP(), InitDSP2(), InitDSP3(), InitDSP4(), InitOBC(), InitFxTables(), initregr(), initregw();
|
||||||
void SPC7110Load(), DOSClearScreen(), dosmakepal();
|
void SPC7110Load(), DOSClearScreen(), dosmakepal();
|
||||||
|
|
||||||
void CheckROMType()
|
void CheckROMType()
|
||||||
@@ -2002,6 +2002,14 @@ void CheckROMType()
|
|||||||
map_mem(0x30, &dsp4bank, 0x10);
|
map_mem(0x30, &dsp4bank, 0x10);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (OBCEnable)
|
||||||
|
{
|
||||||
|
InitOBC();
|
||||||
|
|
||||||
|
map_mem(0x00, &obc1bank, 0x40);
|
||||||
|
map_mem(0x80, &obc1bank, 0x40);
|
||||||
|
}
|
||||||
|
|
||||||
if (SFXEnable)
|
if (SFXEnable)
|
||||||
{
|
{
|
||||||
// Setup SuperFX stuff
|
// Setup SuperFX stuff
|
||||||
|
|||||||
@@ -152,7 +152,8 @@ CHIPSOBJ=${CHIPDIR}/dsp1emu${OE} ${CHIPDIR}/fxemu2${OE} ${CHIPDIR}/sfxproc${OE}\
|
|||||||
${CHIPDIR}/sa1proc${OE} ${CHIPDIR}/sa1regs${OE} ${CHIPDIR}/dsp1proc${OE}\
|
${CHIPDIR}/sa1proc${OE} ${CHIPDIR}/sa1regs${OE} ${CHIPDIR}/dsp1proc${OE}\
|
||||||
${CHIPDIR}/st10proc${OE} ${CHIPDIR}/seta10${OE} ${CHIPDIR}/dsp2proc${OE}\
|
${CHIPDIR}/st10proc${OE} ${CHIPDIR}/seta10${OE} ${CHIPDIR}/dsp2proc${OE}\
|
||||||
${CHIPDIR}/sdd1emu${OE} ${CHIPDIR}/c4emu${OE} ${CHIPDIR}/dsp4proc${OE}\
|
${CHIPDIR}/sdd1emu${OE} ${CHIPDIR}/c4emu${OE} ${CHIPDIR}/dsp4proc${OE}\
|
||||||
${CHIPDIR}/dsp4emu${OE} ${CHIPDIR}/dsp3proc${OE} ${CHIPDIR}/dsp3emu${OE}
|
${CHIPDIR}/dsp4emu${OE} ${CHIPDIR}/dsp3proc${OE} ${CHIPDIR}/dsp3emu${OE}\
|
||||||
|
${CHIPDIR}/obc1emu${OE} ${CHIPDIR}/obc1proc${OE}
|
||||||
|
|
||||||
CPUOBJ=${CPUDIR}/dma${OE} ${CPUDIR}/dsp${OE} ${CPUDIR}/dspproc${OE}\
|
CPUOBJ=${CPUDIR}/dma${OE} ${CPUDIR}/dsp${OE} ${CPUDIR}/dspproc${OE}\
|
||||||
${CPUDIR}/execute${OE} ${CPUDIR}/executec${OE} ${CPUDIR}/irq${OE}\
|
${CPUDIR}/execute${OE} ${CPUDIR}/executec${OE} ${CPUDIR}/irq${OE}\
|
||||||
@@ -289,6 +290,8 @@ ${CHIPDIR}/fxemu2b${OE}: ${CHIPDIR}/fxemu2b.asm macros.mac ${CHIPDIR}/fxemu2.mac
|
|||||||
${CHIPDIR}/fxemu2c${OE}: ${CHIPDIR}/fxemu2c.asm macros.mac ${CHIPDIR}/fxemu2.mac\
|
${CHIPDIR}/fxemu2c${OE}: ${CHIPDIR}/fxemu2c.asm macros.mac ${CHIPDIR}/fxemu2.mac\
|
||||||
${CHIPDIR}/fxemu2c.mac
|
${CHIPDIR}/fxemu2c.mac
|
||||||
${CHIPDIR}/fxtable${OE}: ${CHIPDIR}/fxtable.asm macros.mac
|
${CHIPDIR}/fxtable${OE}: ${CHIPDIR}/fxtable.asm macros.mac
|
||||||
|
${CHIPDIR}/obc1emu${OE}: ${CHIPDIR}/obc1emu.c
|
||||||
|
${CHIPDIR}/obc1proc${OE}: ${CHIPDIR}/obc1proc.asm macros.mac
|
||||||
${CHIPDIR}/sa1proc${OE}: ${CHIPDIR}/sa1proc.asm macros.mac
|
${CHIPDIR}/sa1proc${OE}: ${CHIPDIR}/sa1proc.asm macros.mac
|
||||||
${CHIPDIR}/sa1regs${OE}: ${CHIPDIR}/sa1regs.asm macros.mac\
|
${CHIPDIR}/sa1regs${OE}: ${CHIPDIR}/sa1regs.asm macros.mac\
|
||||||
${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac
|
${CPUDIR}/regs.mac ${CPUDIR}/regsw.mac
|
||||||
|
|||||||
Reference in New Issue
Block a user