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Some DSP-3 stuff before I go mad.

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This commit is contained in:
n-a-c-h
2005-10-20 16:34:43 +00:00
parent 03e90fd627
commit 1a54764bb5
2 changed files with 3 additions and 1 deletions
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2
zsnes/src/cpu/memtable.c
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@@ -255,6 +255,7 @@ void SA1RAMaccessbankr8b(), SA1RAMaccessbankw8b(), SA1RAMaccessbankr16b(), SA1RA
void sramaccessbankr8s(), sramaccessbankw8s(), sramaccessbankr16s(), sramaccessbankw16s(); void sramaccessbankr8s(), sramaccessbankw8s(), sramaccessbankr16s(), sramaccessbankw16s();
void DSP1Read8b3F(), DSP1Write8b3F(), DSP1Read16b3F(), DSP1Write16b3F(); void DSP1Read8b3F(), DSP1Write8b3F(), DSP1Read16b3F(), DSP1Write16b3F();
void DSP2Read8b(), DSP2Write8b(), DSP2Read16b(), DSP2Write16b(); void DSP2Read8b(), DSP2Write8b(), DSP2Read16b(), DSP2Write16b();
//void DSP3Read8b(), DSP3Write8b(), DSP3Read16b(), DSP3Write16b();
void DSP4Read8b(), DSP4Write8b(), DSP4Read16b(), DSP4Write16b(); void DSP4Read8b(), DSP4Write8b(), DSP4Read16b(), DSP4Write16b();
void setaaccessbankr8(), setaaccessbankw8(), setaaccessbankr16(), setaaccessbankw16(); void setaaccessbankr8(), setaaccessbankw8(), setaaccessbankr16(), setaaccessbankw16();
void setaaccessbankr8a(), setaaccessbankw8a(), setaaccessbankr16a(), setaaccessbankw16a(); void setaaccessbankr8a(), setaaccessbankw8a(), setaaccessbankr16a(), setaaccessbankw16a();
@@ -276,6 +277,7 @@ mrwp sa1rambankb = { SA1RAMaccessbankr8b, SA1RAMaccessbankw8b, SA1RAMaccessbankr
mrwp sramsbank = { sramaccessbankr8s, sramaccessbankw8s, sramaccessbankr16s, sramaccessbankw16s }; mrwp sramsbank = { sramaccessbankr8s, sramaccessbankw8s, sramaccessbankr16s, sramaccessbankw16s };
mrwp dsp1bank = { DSP1Read8b3F, DSP1Write8b3F, DSP1Read16b3F, DSP1Write16b3F }; mrwp dsp1bank = { DSP1Read8b3F, DSP1Write8b3F, DSP1Read16b3F, DSP1Write16b3F };
mrwp dsp2bank = { DSP2Read8b, DSP2Write8b, DSP2Read16b, DSP2Write16b }; mrwp dsp2bank = { DSP2Read8b, DSP2Write8b, DSP2Read16b, DSP2Write16b };
//mrwp dsp3bank = { DSP3Read8b, DSP3Write8b, DSP3Read16b, DSP3Write16b };
mrwp dsp4bank = { DSP4Read8b, DSP4Write8b, DSP4Read16b, DSP4Write16b }; mrwp dsp4bank = { DSP4Read8b, DSP4Write8b, DSP4Read16b, DSP4Write16b };
mrwp setabank = { setaaccessbankr8, setaaccessbankw8, setaaccessbankr16, setaaccessbankw16 }; mrwp setabank = { setaaccessbankr8, setaaccessbankw8, setaaccessbankr16, setaaccessbankw16 };
mrwp setabanka = { setaaccessbankr8a, setaaccessbankw8a, setaaccessbankr16a, setaaccessbankw16a }; mrwp setabanka = { setaaccessbankr8a, setaaccessbankw8a, setaaccessbankr16a, setaaccessbankw16a };

2
zsnes/src/cpu/memtable.h
View File

@@ -38,7 +38,7 @@ typedef struct
extern mrwp regbank, membank, wrambank, srambank, erambank, sramsbank; extern mrwp regbank, membank, wrambank, srambank, erambank, sramsbank;
extern mrwp sa1regbank, sa1rambank, sa1rambankb; extern mrwp sa1regbank, sa1rambank, sa1rambankb;
extern mrwp dsp1bank, dsp2bank, dsp4bank; extern mrwp dsp1bank, dsp2bank, /* dsp3bank, */ dsp4bank;
extern mrwp setabank, setabanka; extern mrwp setabank, setabanka;
extern mrwp sfxbank, sfxbankb, sfxbankc, sfxbankd; extern mrwp sfxbank, sfxbankb, sfxbankc, sfxbankd;